Clobber non-live temporaries on some paths involving a possible slow-path allocation.

runtime/vm/flow_graph_compiler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 1452 matching lines @@
     __ slt(CMPRES2, right, left);
   }
 }
 
 
 // This function must be in sync with FlowGraphCompiler::RecordSafepoint and
 // FlowGraphCompiler::SlowPathEnvironmentFor.
 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
 #if defined(DEBUG)
   locs->CheckWritableInputs();
+  ClobberDeadTempRegisters(locs);
 #endif
 
   __ TraceSimMsg("SaveLiveRegisters");
   // TODO(vegorov): consider saving only caller save (volatile) registers.
   const intptr_t fpu_regs_count= locs->live_registers()->FpuRegisterCount();
   if (fpu_regs_count > 0) {
     __ AddImmediate(SP, -(fpu_regs_count * kFpuRegisterSize));
     // Store fpu registers with the lowest register number at the lowest
     // address.
     intptr_t offset = 0;
@@ skipping 22 matching lines @@
         offset -= kWordSize;
         __ sw(r, Address(SP, offset));
       }
     }
     ASSERT(offset == 0);
   }
 }
 
 
 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) {
+#if defined(DEBUG)
+  ClobberDeadTempRegisters(locs);
+#endif
   // General purpose registers have the highest register number at the
   // lowest address.
   __ TraceSimMsg("RestoreLiveRegisters");
   const intptr_t cpu_registers = locs->live_registers()->cpu_registers();
   ASSERT((cpu_registers & ~kAllCpuRegistersList) == 0);
   const int register_count = Utils::CountOneBits(cpu_registers);
   if (register_count > 0) {
     intptr_t offset = register_count * kWordSize;
     for (int i = 0; i < kNumberOfCpuRegisters; i++) {
       Register r = static_cast<Register>(i);
@@ skipping 16 matching lines @@
         __ LoadDFromOffset(fpu_reg, SP, offset);
         offset += kFpuRegisterSize;
       }
     }
     ASSERT(offset == (fpu_regs_count * kFpuRegisterSize));
     __ AddImmediate(SP, offset);
   }
 }
 
 
+#if defined(DEBUG)
+void FlowGraphCompiler::ClobberDeadTempRegisters(LocationSummary* locs) {
+  // Clobber temporaries that have not been manually preserved.
+  for (intptr_t i = 0; i < locs->temp_count(); ++i) {
+    Location tmp = locs->temp(i);
+    // TODO(zerny): clobber non-live temporary FPU registers.
+    if (tmp.IsRegister() &&
+        !locs->live_registers()->ContainsRegister(tmp.reg())) {
+      __ LoadImmediate(tmp.reg(), 0xf7);
+    }
+  }
+}
+#endif
+
+
 void FlowGraphCompiler::EmitTestAndCall(const ICData& ic_data,
                                         Register class_id_reg,
                                         intptr_t argument_count,
                                         const Array& argument_names,
                                         Label* deopt,
                                         intptr_t deopt_id,
                                         intptr_t token_index,
                                         LocationSummary* locs) {
   ASSERT(is_optimizing());
   ASSERT(!ic_data.IsNull() && (ic_data.NumberOfUsedChecks() > 0));
@@ skipping 276 matching lines @@
   __ AddImmediate(SP, kDoubleSize);
 }
 
 
 #undef __
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS