| Index: src/compiler/mips64/instruction-selector-mips64.cc
|
| diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc
|
| index 7cf12b67b0b5c5f1debf0ae0a70fb506604a1da7..1d08bdf6045a897c10b17e3e74f436dd019ea916 100644
|
| --- a/src/compiler/mips64/instruction-selector-mips64.cc
|
| +++ b/src/compiler/mips64/instruction-selector-mips64.cc
|
| @@ -708,9 +708,18 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
|
| UNREACHABLE();
|
| return;
|
| }
|
| - InstructionOperand* offset_operand = g.UseRegister(offset);
|
| + InstructionOperand* offset_operand = g.CanBeImmediate(offset, opcode)
|
| + ? g.UseImmediate(offset)
|
| + : g.UseRegister(offset);
|
| +
|
| + InstructionOperand* length_operand =
|
| + (!g.CanBeImmediate(offset, opcode)) ? g.CanBeImmediate(length, opcode)
|
| + ? g.UseImmediate(length)
|
| + : g.UseRegister(length)
|
| + : g.UseRegister(length);
|
| +
|
| Emit(opcode | AddressingModeField::encode(kMode_MRI),
|
| - g.DefineAsRegister(node), offset_operand, g.UseRegister(length),
|
| + g.DefineAsRegister(node), offset_operand, length_operand,
|
| g.UseRegister(buffer));
|
| }
|
|
|
| @@ -743,9 +752,18 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
|
| UNREACHABLE();
|
| return;
|
| }
|
| - InstructionOperand* offset_operand = g.UseRegister(offset);
|
| + InstructionOperand* offset_operand = g.CanBeImmediate(offset, opcode)
|
| + ? g.UseImmediate(offset)
|
| + : g.UseRegister(offset);
|
| +
|
| + InstructionOperand* length_operand =
|
| + (!g.CanBeImmediate(offset, opcode)) ? g.CanBeImmediate(length, opcode)
|
| + ? g.UseImmediate(length)
|
| + : g.UseRegister(length)
|
| + : g.UseRegister(length);
|
| +
|
| Emit(opcode | AddressingModeField::encode(kMode_MRI), nullptr, offset_operand,
|
| - g.UseRegister(length), g.UseRegister(value), g.UseRegister(buffer));
|
| + length_operand, g.UseRegister(value), g.UseRegister(buffer));
|
| }
|
|
|
|
|
|
|