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Side by Side Diff: src/compiler/mips/code-generator-mips.cc

Issue 782493002: MIPS; Improve checked load/store operators for constant offset and length. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Comments addressed. Created 6 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 #include "src/compiler/code-generator-impl.h" 6 #include "src/compiler/code-generator-impl.h"
7 #include "src/compiler/gap-resolver.h" 7 #include "src/compiler/gap-resolver.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties-inl.h" 9 #include "src/compiler/node-properties-inl.h"
10 #include "src/mips/macro-assembler-mips.h" 10 #include "src/mips/macro-assembler-mips.h"
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158 158
159 void Generate() FINAL { __ mov(result_, zero_reg); } 159 void Generate() FINAL { __ mov(result_, zero_reg); }
160 160
161 private: 161 private:
162 Register const result_; 162 Register const result_;
163 }; 163 };
164 164
165 } // namespace 165 } // namespace
166 166
167 167
168 #define ASSEMBLE_CHECKED_LOAD_FLOAT(width, asm_instr) \ 168 #define ASSEMBLE_CHECKED_LOAD_FLOAT(width, asm_instr) \
169 do { \ 169 do { \
170 auto result = i.Output##width##Register(); \ 170 auto result = i.Output##width##Register(); \
171 auto offset = i.InputRegister(0); \ 171 auto ool = new (zone()) OutOfLineLoad##width(this, result); \
172 auto ool = new (zone()) OutOfLineLoad##width(this, result); \ 172 if (instr->InputAt(0)->IsRegister()) { \
173 __ Branch(ool->entry(), hs, offset, Operand(i.InputRegister(1))); \ 173 auto offset = i.InputRegister(0); \
174 __ addu(at, i.InputRegister(2), offset); \ 174 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
175 __ asm_instr(result, MemOperand(at, 0)); \ 175 __ addu(at, i.InputRegister(2), offset); \
176 __ bind(ool->exit()); \ 176 __ asm_instr(result, MemOperand(at, 0)); \
177 } else { \
178 auto offset = i.InputOperand(0).immediate(); \
179 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \
180 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \
181 } \
182 __ bind(ool->exit()); \
177 } while (0) 183 } while (0)
178 184
179 185
180 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \ 186 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \
181 do { \ 187 do { \
182 auto result = i.OutputRegister(); \ 188 auto result = i.OutputRegister(); \
183 auto offset = i.InputRegister(0); \ 189 auto ool = new (zone()) OutOfLineLoadInteger(this, result); \
184 auto ool = new (zone()) OutOfLineLoadInteger(this, result); \ 190 if (instr->InputAt(0)->IsRegister()) { \
185 __ Branch(ool->entry(), hs, offset, Operand(i.InputRegister(1))); \ 191 auto offset = i.InputRegister(0); \
186 __ addu(at, i.InputRegister(2), offset); \ 192 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
187 __ asm_instr(result, MemOperand(at, 0)); \ 193 __ addu(at, i.InputRegister(2), offset); \
188 __ bind(ool->exit()); \ 194 __ asm_instr(result, MemOperand(at, 0)); \
195 } else { \
196 auto offset = i.InputOperand(0).immediate(); \
197 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \
198 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \
199 } \
200 __ bind(ool->exit()); \
189 } while (0) 201 } while (0)
190 202
191 203
192 #define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr) \ 204 #define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr) \
193 do { \ 205 do { \
194 auto offset = i.InputRegister(0); \ 206 Label done; \
195 Label done; \ 207 if (instr->InputAt(0)->IsRegister()) { \
196 __ Branch(&done, hs, offset, Operand(i.InputRegister(1))); \ 208 auto offset = i.InputRegister(0); \
197 auto value = i.Input##width##Register(2); \ 209 auto value = i.Input##width##Register(2); \
198 __ addu(at, i.InputRegister(3), offset); \ 210 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
199 __ asm_instr(value, MemOperand(at, 0)); \ 211 __ addu(at, i.InputRegister(3), offset); \
200 __ bind(&done); \ 212 __ asm_instr(value, MemOperand(at, 0)); \
213 } else { \
214 auto offset = i.InputOperand(0).immediate(); \
215 auto value = i.Input##width##Register(2); \
216 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \
217 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \
218 } \
219 __ bind(&done); \
201 } while (0) 220 } while (0)
202 221
203 222
204 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ 223 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
205 do { \ 224 do { \
206 auto offset = i.InputRegister(0); \ 225 Label done; \
207 Label done; \ 226 if (instr->InputAt(0)->IsRegister()) { \
208 __ Branch(&done, hs, offset, Operand(i.InputRegister(1))); \ 227 auto offset = i.InputRegister(0); \
209 auto value = i.InputRegister(2); \ 228 auto value = i.InputRegister(2); \
210 __ addu(at, i.InputRegister(3), offset); \ 229 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
211 __ asm_instr(value, MemOperand(at, 0)); \ 230 __ addu(at, i.InputRegister(3), offset); \
212 __ bind(&done); \ 231 __ asm_instr(value, MemOperand(at, 0)); \
232 } else { \
233 auto offset = i.InputOperand(0).immediate(); \
234 auto value = i.InputRegister(2); \
235 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \
236 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \
237 } \
238 __ bind(&done); \
213 } while (0) 239 } while (0)
214 240
215 241
216 // Assembles an instruction after register allocation, producing machine code. 242 // Assembles an instruction after register allocation, producing machine code.
217 void CodeGenerator::AssembleArchInstruction(Instruction* instr) { 243 void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
218 MipsOperandConverter i(this, instr); 244 MipsOperandConverter i(this, instr);
219 InstructionCode opcode = instr->opcode(); 245 InstructionCode opcode = instr->opcode();
220 246
221 switch (ArchOpcodeField::decode(opcode)) { 247 switch (ArchOpcodeField::decode(opcode)) {
222 case kArchCallCodeObject: { 248 case kArchCallCodeObject: {
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1077 } 1103 }
1078 } 1104 }
1079 MarkLazyDeoptSite(); 1105 MarkLazyDeoptSite();
1080 } 1106 }
1081 1107
1082 #undef __ 1108 #undef __
1083 1109
1084 } // namespace compiler 1110 } // namespace compiler
1085 } // namespace internal 1111 } // namespace internal
1086 } // namespace v8 1112 } // namespace v8
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