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Side by Side Diff: src/trusted/validator_arm/testdata-thumb/test_stores.S

Issue 7799013: Intial Thumb2 Sandbox (naclrev 6680) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client
Patch Set: asdsa Created 9 years, 2 months ago
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1 @ Copyright (c) 2011 The Native Client Authors. All rights reserved.
2 @ Use of this source code is governed by a BSD-style license that can be
3 @ found in the LICENSE file.
4 @ Copyright (c) 2011 Google Inc.
5
6 @
7 @ Tests both legal and illegal variations on stores -- both stores that
8 @ require masking, and stores that are guaranteed sandboxed (i.e. through SP)
9 @
10
11 @ we restrict store to the lower 1GB of the address space
12 #define MASK 0xc0000000
13
14 .syntax unified
15 .code 16
16 .thumb_func
17 .global _start
18 _start:
19 bundle0:
20 bic r1, r3, #MASK @ Generating a confined address
21 str r0, [r1] @ and storing to it is fine.
22
23 bic r1, r1, #MASK @ Confining an address in place
24 str r0, [r1] @ and storing to it is fine.
25 nop
26 nop
27 bundle1:
28 mov r1, r3 @ Just poking at the address
29 str r0, [r1] @ and storing to it is an ERROR.
30
31 bic r1, r3, #0 @ Even if we use BIC, if the mask is wrong,
32 str r0, [r1] @ still an ERROR.
33 nop
34 nop
35 nop
36
37 bundle2:
38 nop
39 nop
40 nop
41 nop
42 nop
43 nop
44 bic r1, r3, #MASK @ If the BIC is in a different bundle...
45
46 bundle3:
47 str r0, [r1] @ ...then the store is an ERROR.
48 itt eq
49
50 biceq r2, r2, #0xC0000000 @ Mask a register and
51 strexeq r0, r1, [r2] @ use it in a store-exclusive. Should pass.
52
53 nop
54 nop
55 bundle4:
56 bic r2, r2, #0 @ Mask incorrectly and
57 strex r0, r1, [r2] @ use it in a store-exclusive, for an ERROR.
58
59 nop
60 nop
61 nop
62 nop
63
64 // Post indexing does not exist in Thumb
65 /*
66 bundle5:
67 bic r0, r0, #0xC0000000 @ Mask a register, and
68 str r1, [r0], r2 @ use it in register post-index store: should pass.
69 nop @ Don't mask, and
70 str r1, [r0], r2 @ use it in register post-index store: ERROR.
71 */
72
73 // We don't have a conditional sandbox, so I've disabled all "valid" sequences
74 conditional_sandbox:
75 /*
76 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
77 it eq
78 streq r1, [r0] @ store: should work.
79 */
80
81 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
82 str r1, [r0] @ store unconditionally: ERROR.
83
84 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
85 it gt
86 strgt r1, [r0] @ store using wrong predicate: ERROR.
87
88 it eq
89 tsteq r0, #0xC0000000 @ Conditionally set Z if the top two bits are clear,
90 it gt
91 strgt r1, [r0] @ and store using wrong predicate: ERROR.
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