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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
6 | 6 |
7 #include "src/v8.h" | 7 #include "src/v8.h" |
8 | 8 |
9 #if V8_TARGET_ARCH_MIPS64 | 9 #if V8_TARGET_ARCH_MIPS64 |
10 | 10 |
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3987 SmiCheckType smi_check_type) { | 3987 SmiCheckType smi_check_type) { |
3988 if (smi_check_type == DO_SMI_CHECK) { | 3988 if (smi_check_type == DO_SMI_CHECK) { |
3989 JumpIfSmi(obj, fail); | 3989 JumpIfSmi(obj, fail); |
3990 } | 3990 } |
3991 ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); | 3991 ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); |
3992 LoadRoot(at, index); | 3992 LoadRoot(at, index); |
3993 Branch(fail, ne, scratch, Operand(at)); | 3993 Branch(fail, ne, scratch, Operand(at)); |
3994 } | 3994 } |
3995 | 3995 |
3996 | 3996 |
3997 void MacroAssembler::CmpWeakValue(Register match, Register value, | 3997 void MacroAssembler::GetWeakValue(Register value, Handle<WeakCell> cell) { |
3998 Handle<WeakCell> cell) { | 3998 li(value, Operand(cell)); |
3999 li(match, Operand(cell)); | 3999 ld(value, FieldMemOperand(value, WeakCell::kValueOffset)); |
4000 ld(match, FieldMemOperand(match, WeakCell::kValueOffset)); | |
4001 Dsubu(match, value, match); | |
4002 } | 4000 } |
4003 | 4001 |
4004 | 4002 |
4005 void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell, | 4003 void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell, |
4006 Label* miss) { | 4004 Label* miss) { |
4007 li(value, Operand(cell)); | 4005 GetWeakValue(value, cell); |
4008 ld(value, FieldMemOperand(value, WeakCell::kValueOffset)); | |
4009 JumpIfSmi(value, miss); | 4006 JumpIfSmi(value, miss); |
4010 } | 4007 } |
4011 | 4008 |
4012 | 4009 |
4013 void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) { | 4010 void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) { |
4014 if (IsMipsSoftFloatABI) { | 4011 if (IsMipsSoftFloatABI) { |
4015 Move(dst, v0, v1); | 4012 Move(dst, v0, v1); |
4016 } else { | 4013 } else { |
4017 Move(dst, f0); // Reg f0 is o32 ABI FP return value. | 4014 Move(dst, f0); // Reg f0 is o32 ABI FP return value. |
4018 } | 4015 } |
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6319 } | 6316 } |
6320 if (mag.shift > 0) sra(result, result, mag.shift); | 6317 if (mag.shift > 0) sra(result, result, mag.shift); |
6321 srl(at, dividend, 31); | 6318 srl(at, dividend, 31); |
6322 Addu(result, result, Operand(at)); | 6319 Addu(result, result, Operand(at)); |
6323 } | 6320 } |
6324 | 6321 |
6325 | 6322 |
6326 } } // namespace v8::internal | 6323 } } // namespace v8::internal |
6327 | 6324 |
6328 #endif // V8_TARGET_ARCH_MIPS64 | 6325 #endif // V8_TARGET_ARCH_MIPS64 |
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