| Index: src/ia32/assembler-ia32.h
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| diff --git a/src/ia32/assembler-ia32.h b/src/ia32/assembler-ia32.h
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| index 11a0b4f857f4caaa395ef7a818a0712eb94fb7ed..b913f7afc8e2af773ea019e5ab81ac22b0ca4e14 100644
|
| --- a/src/ia32/assembler-ia32.h
|
| +++ b/src/ia32/assembler-ia32.h
|
| @@ -928,6 +928,17 @@ class Assembler : public AssemblerBase {
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| void cpuid();
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|
|
| // SSE instructions
|
| + void addss(XMMRegister dst, XMMRegister src) { addss(dst, Operand(src)); }
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| + void addss(XMMRegister dst, const Operand& src);
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| + void subss(XMMRegister dst, XMMRegister src) { subss(dst, Operand(src)); }
|
| + void subss(XMMRegister dst, const Operand& src);
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| + void mulss(XMMRegister dst, XMMRegister src) { mulss(dst, Operand(src)); }
|
| + void mulss(XMMRegister dst, const Operand& src);
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| + void divss(XMMRegister dst, XMMRegister src) { divss(dst, Operand(src)); }
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| + void divss(XMMRegister dst, const Operand& src);
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| +
|
| + void ucomiss(XMMRegister dst, XMMRegister src) { ucomiss(dst, Operand(src)); }
|
| + void ucomiss(XMMRegister dst, const Operand& src);
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| void movaps(XMMRegister dst, XMMRegister src);
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| void shufps(XMMRegister dst, XMMRegister src, byte imm8);
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|
|
| @@ -1053,6 +1064,154 @@ class Assembler : public AssemblerBase {
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| void movntdq(const Operand& dst, XMMRegister src);
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|
|
| // AVX instructions
|
| + void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmadd132sd(dst, src1, Operand(src2));
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| + }
|
| + void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmadd213sd(dst, src1, Operand(src2));
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| + }
|
| + void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmadd231sd(dst, src1, Operand(src2));
|
| + }
|
| + void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0x99, dst, src1, src2);
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| + }
|
| + void vfmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0xa9, dst, src1, src2);
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| + }
|
| + void vfmadd231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0xb9, dst, src1, src2);
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| + }
|
| + void vfmsub132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmsub132sd(dst, src1, Operand(src2));
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| + }
|
| + void vfmsub213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmsub213sd(dst, src1, Operand(src2));
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| + }
|
| + void vfmsub231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmsub231sd(dst, src1, Operand(src2));
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| + }
|
| + void vfmsub132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0x9b, dst, src1, src2);
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| + }
|
| + void vfmsub213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0xab, dst, src1, src2);
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| + }
|
| + void vfmsub231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0xbb, dst, src1, src2);
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| + }
|
| + void vfnmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmadd132sd(dst, src1, Operand(src2));
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| + }
|
| + void vfnmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmadd213sd(dst, src1, Operand(src2));
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| + }
|
| + void vfnmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmadd231sd(dst, src1, Operand(src2));
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| + }
|
| + void vfnmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0x9d, dst, src1, src2);
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| + }
|
| + void vfnmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0xad, dst, src1, src2);
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| + }
|
| + void vfnmadd231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0xbd, dst, src1, src2);
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| + }
|
| + void vfnmsub132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmsub132sd(dst, src1, Operand(src2));
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| + }
|
| + void vfnmsub213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmsub213sd(dst, src1, Operand(src2));
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| + }
|
| + void vfnmsub231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmsub231sd(dst, src1, Operand(src2));
|
| + }
|
| + void vfnmsub132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmasd(0x9f, dst, src1, src2);
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| + }
|
| + void vfnmsub213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0xaf, dst, src1, src2);
|
| + }
|
| + void vfnmsub231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmasd(0xbf, dst, src1, src2);
|
| + }
|
| + void vfmasd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
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| +
|
| + void vfmadd132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmadd132ss(dst, src1, Operand(src2));
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| + }
|
| + void vfmadd213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmadd213ss(dst, src1, Operand(src2));
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| + }
|
| + void vfmadd231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfmadd231ss(dst, src1, Operand(src2));
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| + }
|
| + void vfmadd132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0x99, dst, src1, src2);
|
| + }
|
| + void vfmadd213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xa9, dst, src1, src2);
|
| + }
|
| + void vfmadd231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xb9, dst, src1, src2);
|
| + }
|
| + void vfmsub132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfmsub132ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfmsub213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfmsub213ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfmsub231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfmsub231ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfmsub132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0x9b, dst, src1, src2);
|
| + }
|
| + void vfmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xab, dst, src1, src2);
|
| + }
|
| + void vfmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmass(0xbb, dst, src1, src2);
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| + }
|
| + void vfnmadd132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmadd132ss(dst, src1, Operand(src2));
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| + }
|
| + void vfnmadd213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmadd213ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfnmadd231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| + vfnmadd231ss(dst, src1, Operand(src2));
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| + }
|
| + void vfnmadd132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0x9d, dst, src1, src2);
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| + }
|
| + void vfnmadd213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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| + vfmass(0xad, dst, src1, src2);
|
| + }
|
| + void vfnmadd231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xbd, dst, src1, src2);
|
| + }
|
| + void vfnmsub132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmsub132ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfnmsub213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmsub213ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfnmsub231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
|
| + vfnmsub231ss(dst, src1, Operand(src2));
|
| + }
|
| + void vfnmsub132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0x9f, dst, src1, src2);
|
| + }
|
| + void vfnmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xaf, dst, src1, src2);
|
| + }
|
| + void vfnmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
|
| + vfmass(0xbf, dst, src1, src2);
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| + }
|
| + void vfmass(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
|
| +
|
| void vaddsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
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| vaddsd(dst, src1, Operand(src2));
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| }
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|
|