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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2436 EnsureSpace ensure_space(this); | 2436 EnsureSpace ensure_space(this); |
2437 EMIT(0x66); | 2437 EMIT(0x66); |
2438 EMIT(0x0F); | 2438 EMIT(0x0F); |
2439 EMIT(0x3A); | 2439 EMIT(0x3A); |
2440 EMIT(0x22); | 2440 EMIT(0x22); |
2441 emit_sse_operand(dst, src); | 2441 emit_sse_operand(dst, src); |
2442 EMIT(offset); | 2442 EMIT(offset); |
2443 } | 2443 } |
2444 | 2444 |
2445 | 2445 |
| 2446 void Assembler::addss(XMMRegister dst, const Operand& src) { |
| 2447 EnsureSpace ensure_space(this); |
| 2448 EMIT(0xF3); |
| 2449 EMIT(0x0F); |
| 2450 EMIT(0x58); |
| 2451 emit_sse_operand(dst, src); |
| 2452 } |
| 2453 |
| 2454 |
| 2455 void Assembler::subss(XMMRegister dst, const Operand& src) { |
| 2456 EnsureSpace ensure_space(this); |
| 2457 EMIT(0xF3); |
| 2458 EMIT(0x0F); |
| 2459 EMIT(0x5C); |
| 2460 emit_sse_operand(dst, src); |
| 2461 } |
| 2462 |
| 2463 |
| 2464 void Assembler::mulss(XMMRegister dst, const Operand& src) { |
| 2465 EnsureSpace ensure_space(this); |
| 2466 EMIT(0xF3); |
| 2467 EMIT(0x0F); |
| 2468 EMIT(0x59); |
| 2469 emit_sse_operand(dst, src); |
| 2470 } |
| 2471 |
| 2472 |
| 2473 void Assembler::divss(XMMRegister dst, const Operand& src) { |
| 2474 EnsureSpace ensure_space(this); |
| 2475 EMIT(0xF3); |
| 2476 EMIT(0x0F); |
| 2477 EMIT(0x5E); |
| 2478 emit_sse_operand(dst, src); |
| 2479 } |
| 2480 |
| 2481 |
| 2482 void Assembler::ucomiss(XMMRegister dst, const Operand& src) { |
| 2483 EnsureSpace ensure_space(this); |
| 2484 EMIT(0x0f); |
| 2485 EMIT(0x2e); |
| 2486 emit_sse_operand(dst, src); |
| 2487 } |
| 2488 |
| 2489 |
| 2490 // AVX instructions |
| 2491 void Assembler::vfmasd(byte op, XMMRegister dst, XMMRegister src1, |
| 2492 const Operand& src2) { |
| 2493 DCHECK(IsEnabled(FMA3)); |
| 2494 EnsureSpace ensure_space(this); |
| 2495 emit_vex_prefix(src1, kLIG, k66, k0F38, kW1); |
| 2496 EMIT(op); |
| 2497 emit_sse_operand(dst, src2); |
| 2498 } |
| 2499 |
| 2500 |
| 2501 void Assembler::vfmass(byte op, XMMRegister dst, XMMRegister src1, |
| 2502 const Operand& src2) { |
| 2503 DCHECK(IsEnabled(FMA3)); |
| 2504 EnsureSpace ensure_space(this); |
| 2505 emit_vex_prefix(src1, kLIG, k66, k0F38, kW0); |
| 2506 EMIT(op); |
| 2507 emit_sse_operand(dst, src2); |
| 2508 } |
| 2509 |
| 2510 |
2446 void Assembler::vsd(byte op, XMMRegister dst, XMMRegister src1, | 2511 void Assembler::vsd(byte op, XMMRegister dst, XMMRegister src1, |
2447 const Operand& src2) { | 2512 const Operand& src2) { |
2448 DCHECK(IsEnabled(AVX)); | 2513 DCHECK(IsEnabled(AVX)); |
2449 EnsureSpace ensure_space(this); | 2514 EnsureSpace ensure_space(this); |
2450 emit_vex_prefix(src1, kLIG, kF2, k0F, kWIG); | 2515 emit_vex_prefix(src1, kLIG, kF2, k0F, kWIG); |
2451 EMIT(op); | 2516 EMIT(op); |
2452 emit_sse_operand(dst, src2); | 2517 emit_sse_operand(dst, src2); |
2453 } | 2518 } |
2454 | 2519 |
2455 | 2520 |
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2680 fprintf(coverage_log, "%s\n", file_line); | 2745 fprintf(coverage_log, "%s\n", file_line); |
2681 fflush(coverage_log); | 2746 fflush(coverage_log); |
2682 } | 2747 } |
2683 } | 2748 } |
2684 | 2749 |
2685 #endif | 2750 #endif |
2686 | 2751 |
2687 } } // namespace v8::internal | 2752 } } // namespace v8::internal |
2688 | 2753 |
2689 #endif // V8_TARGET_ARCH_IA32 | 2754 #endif // V8_TARGET_ARCH_IA32 |
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