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Issue 771033003: Revert of Use weak cells in map checks in polymorphic ICs. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 6 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_MIPS64 9 #if V8_TARGET_ARCH_MIPS64
10 10
(...skipping 3970 matching lines...) Expand 10 before | Expand all | Expand 10 after
3981 SmiCheckType smi_check_type) { 3981 SmiCheckType smi_check_type) {
3982 if (smi_check_type == DO_SMI_CHECK) { 3982 if (smi_check_type == DO_SMI_CHECK) {
3983 JumpIfSmi(obj, fail); 3983 JumpIfSmi(obj, fail);
3984 } 3984 }
3985 ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); 3985 ld(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
3986 LoadRoot(at, index); 3986 LoadRoot(at, index);
3987 Branch(fail, ne, scratch, Operand(at)); 3987 Branch(fail, ne, scratch, Operand(at));
3988 } 3988 }
3989 3989
3990 3990
3991 void MacroAssembler::CmpWeakValue(Register match, Register value,
3992 Handle<WeakCell> cell) {
3993 li(match, Operand(cell));
3994 ld(match, FieldMemOperand(match, WeakCell::kValueOffset));
3995 Dsubu(match, value, match);
3996 }
3997
3998
3999 void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell,
4000 Label* miss) {
4001 li(value, Operand(cell));
4002 ld(value, FieldMemOperand(value, WeakCell::kValueOffset));
4003 JumpIfNotSmi(value, miss);
4004 }
4005
4006
4007 void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) { 3991 void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) {
4008 if (IsMipsSoftFloatABI) { 3992 if (IsMipsSoftFloatABI) {
4009 Move(dst, v0, v1); 3993 Move(dst, v0, v1);
4010 } else { 3994 } else {
4011 Move(dst, f0); // Reg f0 is o32 ABI FP return value. 3995 Move(dst, f0); // Reg f0 is o32 ABI FP return value.
4012 } 3996 }
4013 } 3997 }
4014 3998
4015 3999
4016 void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) { 4000 void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) {
(...skipping 2308 matching lines...) Expand 10 before | Expand all | Expand 10 after
6325 } 6309 }
6326 if (mag.shift > 0) sra(result, result, mag.shift); 6310 if (mag.shift > 0) sra(result, result, mag.shift);
6327 srl(at, dividend, 31); 6311 srl(at, dividend, 31);
6328 Addu(result, result, Operand(at)); 6312 Addu(result, result, Operand(at));
6329 } 6313 }
6330 6314
6331 6315
6332 } } // namespace v8::internal 6316 } } // namespace v8::internal
6333 6317
6334 #endif // V8_TARGET_ARCH_MIPS64 6318 #endif // V8_TARGET_ARCH_MIPS64
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