OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
(...skipping 59 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
70 V(Mips64Sh) \ | 70 V(Mips64Sh) \ |
71 V(Mips64Ld) \ | 71 V(Mips64Ld) \ |
72 V(Mips64Lw) \ | 72 V(Mips64Lw) \ |
73 V(Mips64Sw) \ | 73 V(Mips64Sw) \ |
74 V(Mips64Sd) \ | 74 V(Mips64Sd) \ |
75 V(Mips64Lwc1) \ | 75 V(Mips64Lwc1) \ |
76 V(Mips64Swc1) \ | 76 V(Mips64Swc1) \ |
77 V(Mips64Ldc1) \ | 77 V(Mips64Ldc1) \ |
78 V(Mips64Sdc1) \ | 78 V(Mips64Sdc1) \ |
79 V(Mips64Push) \ | 79 V(Mips64Push) \ |
| 80 V(Mips64StoreToStackSlot) \ |
| 81 V(Mips64StackClaim) \ |
80 V(Mips64StoreWriteBarrier) | 82 V(Mips64StoreWriteBarrier) |
81 | 83 |
82 | 84 |
83 // Addressing modes represent the "shape" of inputs to an instruction. | 85 // Addressing modes represent the "shape" of inputs to an instruction. |
84 // Many instructions support multiple addressing modes. Addressing modes | 86 // Many instructions support multiple addressing modes. Addressing modes |
85 // are encoded into the InstructionCode of the instruction and tell the | 87 // are encoded into the InstructionCode of the instruction and tell the |
86 // code generator after register allocation which assembler method to call. | 88 // code generator after register allocation which assembler method to call. |
87 // | 89 // |
88 // We use the following local notation for addressing modes: | 90 // We use the following local notation for addressing modes: |
89 // | 91 // |
90 // R = register | 92 // R = register |
91 // O = register or stack slot | 93 // O = register or stack slot |
92 // D = double register | 94 // D = double register |
93 // I = immediate (handle, external, int32) | 95 // I = immediate (handle, external, int32) |
94 // MRI = [register + immediate] | 96 // MRI = [register + immediate] |
95 // MRR = [register + register] | 97 // MRR = [register + register] |
96 // TODO(plind): Add the new r6 address modes. | 98 // TODO(plind): Add the new r6 address modes. |
97 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 99 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
98 V(MRI) /* [%r0 + K] */ \ | 100 V(MRI) /* [%r0 + K] */ \ |
99 V(MRR) /* [%r0 + %r1] */ | 101 V(MRR) /* [%r0 + %r1] */ |
100 | 102 |
101 | 103 |
102 } // namespace compiler | 104 } // namespace compiler |
103 } // namespace internal | 105 } // namespace internal |
104 } // namespace v8 | 106 } // namespace v8 |
105 | 107 |
106 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 108 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
OLD | NEW |