Index: src/ic/arm/stub-cache-arm.cc |
diff --git a/src/ic/arm/stub-cache-arm.cc b/src/ic/arm/stub-cache-arm.cc |
index bc8b0fba84ffe7586b312adf0e75c72c41446475..1d6bd30b76d16f8b4d031b966a900255fb1197f9 100644 |
--- a/src/ic/arm/stub-cache-arm.cc |
+++ b/src/ic/arm/stub-cache-arm.cc |
@@ -7,7 +7,9 @@ |
#if V8_TARGET_ARCH_ARM |
#include "src/codegen.h" |
+#include "src/ic/ic.h" |
#include "src/ic/stub-cache.h" |
+#include "src/interface-descriptors.h" |
namespace v8 { |
namespace internal { |
@@ -16,7 +18,7 @@ namespace internal { |
static void ProbeTable(Isolate* isolate, MacroAssembler* masm, |
- Code::Flags flags, bool leave_frame, |
+ Code::Kind ic_kind, Code::Flags flags, bool leave_frame, |
StubCache::Table table, Register receiver, Register name, |
// Number of the cache entry, not scaled. |
Register offset, Register scratch, Register scratch2, |
@@ -94,10 +96,11 @@ static void ProbeTable(Isolate* isolate, MacroAssembler* masm, |
} |
-void StubCache::GenerateProbe(MacroAssembler* masm, Code::Flags flags, |
- bool leave_frame, Register receiver, |
- Register name, Register scratch, Register extra, |
- Register extra2, Register extra3) { |
+void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind, |
+ Code::Flags flags, bool leave_frame, |
+ Register receiver, Register name, |
+ Register scratch, Register extra, Register extra2, |
+ Register extra3) { |
Isolate* isolate = masm->isolate(); |
Label miss; |
@@ -109,15 +112,7 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Flags flags, |
DCHECK(Code::ExtractTypeFromFlags(flags) == 0); |
// Make sure that there are no register conflicts. |
- DCHECK(!scratch.is(receiver)); |
- DCHECK(!scratch.is(name)); |
- DCHECK(!extra.is(receiver)); |
- DCHECK(!extra.is(name)); |
- DCHECK(!extra.is(scratch)); |
- DCHECK(!extra2.is(receiver)); |
- DCHECK(!extra2.is(name)); |
- DCHECK(!extra2.is(scratch)); |
- DCHECK(!extra2.is(extra)); |
+ DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3)); |
// Check scratch, extra and extra2 registers are valid. |
DCHECK(!scratch.is(no_reg)); |
@@ -125,6 +120,17 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Flags flags, |
DCHECK(!extra2.is(no_reg)); |
DCHECK(!extra3.is(no_reg)); |
+#ifdef DEBUG |
+ // If vector-based ics are in use, ensure that scratch, extra, extra2 and |
+ // extra3 don't conflict with the vector and slot registers, which need |
+ // to be preserved for a handler call or miss. |
+ if (IC::ICUseVector(ic_kind)) { |
+ Register vector = VectorLoadICDescriptor::VectorRegister(); |
+ Register slot = VectorLoadICDescriptor::SlotRegister(); |
+ DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3)); |
+ } |
+#endif |
+ |
Counters* counters = masm->isolate()->counters(); |
__ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2, |
extra3); |
@@ -147,8 +153,8 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Flags flags, |
__ and_(scratch, scratch, Operand(mask)); |
// Probe the primary table. |
- ProbeTable(isolate, masm, flags, leave_frame, kPrimary, receiver, name, |
- scratch, extra, extra2, extra3); |
+ ProbeTable(isolate, masm, ic_kind, flags, leave_frame, kPrimary, receiver, |
+ name, scratch, extra, extra2, extra3); |
// Primary miss: Compute hash for secondary probe. |
__ sub(scratch, scratch, Operand(name, LSR, kCacheIndexShift)); |
@@ -157,8 +163,8 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Flags flags, |
__ and_(scratch, scratch, Operand(mask2)); |
// Probe the secondary table. |
- ProbeTable(isolate, masm, flags, leave_frame, kSecondary, receiver, name, |
- scratch, extra, extra2, extra3); |
+ ProbeTable(isolate, masm, ic_kind, flags, leave_frame, kSecondary, receiver, |
+ name, scratch, extra, extra2, extra3); |
// Cache miss: Fall-through and let caller handle the miss by |
// entering the runtime system. |