Index: src/arm/code-stubs-arm.cc |
diff --git a/src/arm/code-stubs-arm.cc b/src/arm/code-stubs-arm.cc |
index d294785092f02d0d786e00acb4b4578f92378209..47df2a353e989c6f824bf69199d3c58f6bd0c62c 100644 |
--- a/src/arm/code-stubs-arm.cc |
+++ b/src/arm/code-stubs-arm.cc |
@@ -1438,9 +1438,14 @@ void InstanceofStub::Generate(MacroAssembler* masm) { |
void FunctionPrototypeStub::Generate(MacroAssembler* masm) { |
Label miss; |
Register receiver = LoadDescriptor::ReceiverRegister(); |
- |
- NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, r3, |
- r4, &miss); |
+ // Ensure that the vector and slot registers won't be clobbered before |
+ // calling the miss handler. |
+ DCHECK(!FLAG_vector_ics || |
+ !AreAliased(r4, r5, VectorLoadICDescriptor::VectorRegister(), |
+ VectorLoadICDescriptor::SlotRegister())); |
+ |
+ NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, r4, |
+ r5, &miss); |
__ bind(&miss); |
PropertyAccessCompiler::TailCallBuiltin( |
masm, PropertyAccessCompiler::MissBuiltin(Code::LOAD_IC)); |
@@ -1453,10 +1458,16 @@ void LoadIndexedStringStub::Generate(MacroAssembler* masm) { |
Register receiver = LoadDescriptor::ReceiverRegister(); |
Register index = LoadDescriptor::NameRegister(); |
- Register scratch = r3; |
+ Register scratch = r5; |
Register result = r0; |
DCHECK(!scratch.is(receiver) && !scratch.is(index)); |
+ DCHECK(!FLAG_vector_ics || |
+ (!scratch.is(VectorLoadICDescriptor::VectorRegister()) && |
+ result.is(VectorLoadICDescriptor::SlotRegister()))); |
+ // StringCharAtGenerator doesn't use the result register until it's passed |
+ // the different miss possibilities. If it did, we would have a conflict |
+ // when FLAG_vector_ics is true. |
StringCharAtGenerator char_at_generator(receiver, index, scratch, result, |
&miss, // When not a string. |
&miss, // When not a number. |