Update libvpx snapshot to v0.9.7-p1 (Cayuga).

source/libvpx/vp8/common/x86/x86_systemdependent.c

Index: source/libvpx/vp8/common/x86/x86_systemdependent.c
===================================================================
--- source/libvpx/vp8/common/x86/x86_systemdependent.c	(revision 96967)
+++ source/libvpx/vp8/common/x86/x86_systemdependent.c	(working copy)
@@ -9,7 +9,7 @@
  */
 
 
-#include "vpx_ports/config.h"
+#include "vpx_config.h"
 #include "vpx_ports/x86.h"
 #include "vp8/common/g_common.h"
 #include "vp8/common/subpixel.h"
@@ -24,10 +24,6 @@
 #if CONFIG_RUNTIME_CPU_DETECT
     VP8_COMMON_RTCD *rtcd = &ctx->rtcd;
     int flags = x86_simd_caps();
-    int mmx_enabled = flags & HAS_MMX;
-    int xmm_enabled = flags & HAS_SSE;
-    int wmt_enabled = flags & HAS_SSE2;
-    int SSSE3Enabled = flags & HAS_SSSE3;
 
     /* Note:
      *
@@ -39,7 +35,7 @@
     /* Override default functions with fastest ones for this CPU. */
 #if HAVE_MMX
 
-    if (mmx_enabled)
+    if (flags & HAS_MMX)
     {
         rtcd->idct.idct1        = vp8_short_idct4x4llm_1_mmx;
         rtcd->idct.idct16       = vp8_short_idct4x4llm_mmx;
@@ -67,9 +63,9 @@
         rtcd->loopfilter.normal_b_v  = vp8_loop_filter_bv_mmx;
         rtcd->loopfilter.normal_mb_h = vp8_loop_filter_mbh_mmx;
         rtcd->loopfilter.normal_b_h  = vp8_loop_filter_bh_mmx;
-        rtcd->loopfilter.simple_mb_v = vp8_loop_filter_mbvs_mmx;
+        rtcd->loopfilter.simple_mb_v = vp8_loop_filter_simple_vertical_edge_mmx;
         rtcd->loopfilter.simple_b_v  = vp8_loop_filter_bvs_mmx;
-        rtcd->loopfilter.simple_mb_h = vp8_loop_filter_mbhs_mmx;
+        rtcd->loopfilter.simple_mb_h = vp8_loop_filter_simple_horizontal_edge_mmx;
         rtcd->loopfilter.simple_b_h  = vp8_loop_filter_bhs_mmx;
 
 #if CONFIG_POSTPROC
@@ -83,11 +79,15 @@
 #endif
 #if HAVE_SSE2
 
-    if (wmt_enabled)
+    if (flags & HAS_SSE2)
     {
         rtcd->recon.recon2      = vp8_recon2b_sse2;
         rtcd->recon.recon4      = vp8_recon4b_sse2;
         rtcd->recon.copy16x16   = vp8_copy_mem16x16_sse2;
+        rtcd->recon.build_intra_predictors_mbuv =
+            vp8_build_intra_predictors_mbuv_sse2;
+        rtcd->recon.build_intra_predictors_mbuv_s =
+            vp8_build_intra_predictors_mbuv_s_sse2;
 
         rtcd->idct.iwalsh16     = vp8_short_inv_walsh4x4_sse2;
 
@@ -101,9 +101,9 @@
         rtcd->loopfilter.normal_b_v  = vp8_loop_filter_bv_sse2;
         rtcd->loopfilter.normal_mb_h = vp8_loop_filter_mbh_sse2;
         rtcd->loopfilter.normal_b_h  = vp8_loop_filter_bh_sse2;
-        rtcd->loopfilter.simple_mb_v = vp8_loop_filter_mbvs_sse2;
+        rtcd->loopfilter.simple_mb_v = vp8_loop_filter_simple_vertical_edge_sse2;
         rtcd->loopfilter.simple_b_v  = vp8_loop_filter_bvs_sse2;
-        rtcd->loopfilter.simple_mb_h = vp8_loop_filter_mbhs_sse2;
+        rtcd->loopfilter.simple_mb_h = vp8_loop_filter_simple_horizontal_edge_sse2;
         rtcd->loopfilter.simple_b_h  = vp8_loop_filter_bhs_sse2;
 
 #if CONFIG_POSTPROC
@@ -118,7 +118,7 @@
 
 #if HAVE_SSSE3
 
-    if (SSSE3Enabled)
+    if (flags & HAS_SSSE3)
     {
         rtcd->subpix.sixtap16x16   = vp8_sixtap_predict16x16_ssse3;
         rtcd->subpix.sixtap8x8     = vp8_sixtap_predict8x8_ssse3;
@@ -126,6 +126,11 @@
         rtcd->subpix.sixtap4x4     = vp8_sixtap_predict4x4_ssse3;
         rtcd->subpix.bilinear16x16 = vp8_bilinear_predict16x16_ssse3;
         rtcd->subpix.bilinear8x8   = vp8_bilinear_predict8x8_ssse3;
+
+        rtcd->recon.build_intra_predictors_mbuv =
+            vp8_build_intra_predictors_mbuv_ssse3;
+        rtcd->recon.build_intra_predictors_mbuv_s =
+            vp8_build_intra_predictors_mbuv_s_ssse3;
     }
 #endif