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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1278 } | 1278 } |
1279 void vfnmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) { | 1279 void vfnmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
1280 vfmass(0xaf, dst, src1, src2); | 1280 vfmass(0xaf, dst, src1, src2); |
1281 } | 1281 } |
1282 void vfnmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) { | 1282 void vfnmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
1283 vfmass(0xbf, dst, src1, src2); | 1283 vfmass(0xbf, dst, src1, src2); |
1284 } | 1284 } |
1285 void vfmass(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2); | 1285 void vfmass(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2); |
1286 void vfmass(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2); | 1286 void vfmass(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2); |
1287 | 1287 |
| 1288 void vaddsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { |
| 1289 vsd(0x58, dst, src1, src2); |
| 1290 } |
| 1291 void vaddsd(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
| 1292 vsd(0x58, dst, src1, src2); |
| 1293 } |
| 1294 void vsubsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { |
| 1295 vsd(0x5c, dst, src1, src2); |
| 1296 } |
| 1297 void vsubsd(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
| 1298 vsd(0x5c, dst, src1, src2); |
| 1299 } |
| 1300 void vmulsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { |
| 1301 vsd(0x59, dst, src1, src2); |
| 1302 } |
| 1303 void vmulsd(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
| 1304 vsd(0x59, dst, src1, src2); |
| 1305 } |
| 1306 void vdivsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { |
| 1307 vsd(0x5e, dst, src1, src2); |
| 1308 } |
| 1309 void vdivsd(XMMRegister dst, XMMRegister src1, const Operand& src2) { |
| 1310 vsd(0x5e, dst, src1, src2); |
| 1311 } |
| 1312 void vsd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2); |
| 1313 void vsd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2); |
| 1314 |
1288 // Debugging | 1315 // Debugging |
1289 void Print(); | 1316 void Print(); |
1290 | 1317 |
1291 // Check the code size generated from label to here. | 1318 // Check the code size generated from label to here. |
1292 int SizeOfCodeGeneratedSince(Label* label) { | 1319 int SizeOfCodeGeneratedSince(Label* label) { |
1293 return pc_offset() - label->pos(); | 1320 return pc_offset() - label->pos(); |
1294 } | 1321 } |
1295 | 1322 |
1296 // Mark address of the ExitJSFrame code. | 1323 // Mark address of the ExitJSFrame code. |
1297 void RecordJSReturn(); | 1324 void RecordJSReturn(); |
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1472 void emit_rex(P1 p1, P2 p2, int size) { | 1499 void emit_rex(P1 p1, P2 p2, int size) { |
1473 if (size == kInt64Size) { | 1500 if (size == kInt64Size) { |
1474 emit_rex_64(p1, p2); | 1501 emit_rex_64(p1, p2); |
1475 } else { | 1502 } else { |
1476 DCHECK(size == kInt32Size); | 1503 DCHECK(size == kInt32Size); |
1477 emit_optional_rex_32(p1, p2); | 1504 emit_optional_rex_32(p1, p2); |
1478 } | 1505 } |
1479 } | 1506 } |
1480 | 1507 |
1481 // Emit vex prefix | 1508 // Emit vex prefix |
| 1509 enum SIMDPrefix { kNone = 0x0, k66 = 0x1, kF3 = 0x2, kF2 = 0x3 }; |
| 1510 enum VectorLength { kL128 = 0x0, kL256 = 0x4, kLIG = kL128 }; |
| 1511 enum VexW { kW0 = 0x0, kW1 = 0x80, kWIG = kW0 }; |
| 1512 enum LeadingOpcode { k0F = 0x1, k0F38 = 0x2, k0F3A = 0x2 }; |
| 1513 |
1482 void emit_vex2_byte0() { emit(0xc5); } | 1514 void emit_vex2_byte0() { emit(0xc5); } |
1483 void emit_vex2_byte1(XMMRegister reg, XMMRegister v, byte lpp); | 1515 inline void emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l, |
| 1516 SIMDPrefix pp); |
1484 void emit_vex3_byte0() { emit(0xc4); } | 1517 void emit_vex3_byte0() { emit(0xc4); } |
1485 void emit_vex3_byte1(XMMRegister reg, XMMRegister rm, byte m); | 1518 inline void emit_vex3_byte1(XMMRegister reg, XMMRegister rm, LeadingOpcode m); |
1486 void emit_vex3_byte1(XMMRegister reg, const Operand& rm, byte m); | 1519 inline void emit_vex3_byte1(XMMRegister reg, const Operand& rm, |
1487 void emit_vex3_byte2(byte w, XMMRegister v, byte lpp); | 1520 LeadingOpcode m); |
| 1521 inline void emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l, |
| 1522 SIMDPrefix pp); |
| 1523 inline void emit_vex_prefix(XMMRegister reg, XMMRegister v, XMMRegister rm, |
| 1524 VectorLength l, SIMDPrefix pp, LeadingOpcode m, |
| 1525 VexW w); |
| 1526 inline void emit_vex_prefix(XMMRegister reg, XMMRegister v, const Operand& rm, |
| 1527 VectorLength l, SIMDPrefix pp, LeadingOpcode m, |
| 1528 VexW w); |
1488 | 1529 |
1489 // Emit the ModR/M byte, and optionally the SIB byte and | 1530 // Emit the ModR/M byte, and optionally the SIB byte and |
1490 // 1- or 4-byte offset for a memory operand. Also encodes | 1531 // 1- or 4-byte offset for a memory operand. Also encodes |
1491 // the second operand of the operation, a register or operation | 1532 // the second operand of the operation, a register or operation |
1492 // subcode, into the reg field of the ModR/M byte. | 1533 // subcode, into the reg field of the ModR/M byte. |
1493 void emit_operand(Register reg, const Operand& adr) { | 1534 void emit_operand(Register reg, const Operand& adr) { |
1494 emit_operand(reg.low_bits(), adr); | 1535 emit_operand(reg.low_bits(), adr); |
1495 } | 1536 } |
1496 | 1537 |
1497 // Emit the ModR/M byte, and optionally the SIB byte and | 1538 // Emit the ModR/M byte, and optionally the SIB byte and |
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1796 private: | 1837 private: |
1797 Assembler* assembler_; | 1838 Assembler* assembler_; |
1798 #ifdef DEBUG | 1839 #ifdef DEBUG |
1799 int space_before_; | 1840 int space_before_; |
1800 #endif | 1841 #endif |
1801 }; | 1842 }; |
1802 | 1843 |
1803 } } // namespace v8::internal | 1844 } } // namespace v8::internal |
1804 | 1845 |
1805 #endif // V8_X64_ASSEMBLER_X64_H_ | 1846 #endif // V8_X64_ASSEMBLER_X64_H_ |
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