[turbofan] Add checked load/store operators.

src/compiler/arm64/code-generator-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm64/macro-assembler-arm64.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties-inl.h"
 #include "src/scopes.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 #define __ masm()->
 
 
 // Adds Arm64-specific methods to convert InstructionOperands.
 class Arm64OperandConverter FINAL : public InstructionOperandConverter {
  public:
   Arm64OperandConverter(CodeGenerator* gen, Instruction* instr)
       : InstructionOperandConverter(gen, instr) {}
 
+  DoubleRegister InputFloat32Register(int index) {
+    return InputDoubleRegister(index).S();
+  }
+
+  DoubleRegister InputFloat64Register(int index) {
+    return InputDoubleRegister(index);
+  }
+
+  DoubleRegister OutputFloat32Register() { return OutputDoubleRegister().S(); }
+
+  DoubleRegister OutputFloat64Register() { return OutputDoubleRegister(); }
+
   Register InputRegister32(int index) {
     return ToRegister(instr_->InputAt(index)).W();
   }
 
   Register InputRegister64(int index) { return InputRegister(index); }
 
   Operand InputImmediate(int index) {
     return ToImmediate(instr_->InputAt(index));
   }
 
@@ skipping 62 matching lines @@
         *first_index += 2;
         return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
       case kMode_MRR:
         *first_index += 2;
         return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
     }
     UNREACHABLE();
     return MemOperand(no_reg);
   }
 
-  MemOperand MemoryOperand() {
-    int index = 0;
-    return MemoryOperand(&index);
+  MemOperand MemoryOperand(int first_index = 0) {
+    return MemoryOperand(&first_index);
   }
 
   Operand ToOperand(InstructionOperand* op) {
     if (op->IsRegister()) {
       return Operand(ToRegister(op));
     }
     return ToImmediate(op);
   }
 
   Operand ToOperand32(InstructionOperand* op) {
@@ skipping 34 matching lines @@
     DCHECK(!op->IsDoubleRegister());
     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
     // The linkage computes where all spill slots are located.
     FrameOffset offset = linkage()->GetFrameOffset(op->index(), frame(), 0);
     return MemOperand(offset.from_stack_pointer() ? masm->StackPointer() : fp,
                       offset.offset());
   }
 };
 
 
+namespace {
+
+class OutOfLineLoadFloat32 FINAL : public OutOfLineCode {
+ public:
+  OutOfLineLoadFloat32(CodeGenerator* gen, DoubleRegister result)
+      : OutOfLineCode(gen), result_(result) {}
+
+  void Generate() FINAL {
+    __ Fmov(result_, std::numeric_limits<float>::quiet_NaN());
+  }
+
+ private:
+  DoubleRegister const result_;
+};
+
+
+class OutOfLineLoadFloat64 FINAL : public OutOfLineCode {
+ public:
+  OutOfLineLoadFloat64(CodeGenerator* gen, DoubleRegister result)
+      : OutOfLineCode(gen), result_(result) {}
+
+  void Generate() FINAL {
+    __ Fmov(result_, std::numeric_limits<double>::quiet_NaN());
+  }
+
+ private:
+  DoubleRegister const result_;
+};
+
+
+class OutOfLineLoadInteger FINAL : public OutOfLineCode {
+ public:
+  OutOfLineLoadInteger(CodeGenerator* gen, Register result)
+      : OutOfLineCode(gen), result_(result) {}
+
+  void Generate() FINAL { __ Mov(result_, 0); }
+
+ private:
+  Register const result_;
+};
+
+}  // namespace
+
+
+#define ASSEMBLE_CHECKED_LOAD_FLOAT(width)                           \
+  do {                                                               \
+    auto result = i.OutputFloat##width##Register();                  \
+    auto offset = i.InputRegister32(0);                              \
+    auto length = i.InputOperand32(1);                               \
+    __ Cmp(offset, length);                                          \
+    auto ool = new (zone()) OutOfLineLoadFloat##width(this, result); \
+    __ B(hs, ool->entry());                                          \
+    __ Ldr(result, i.MemoryOperand(2));                              \
+    __ Bind(ool->exit());                                            \
+  } while (0)
+
+
+#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr)                \
+  do {                                                          \
+    auto result = i.OutputRegister32();                         \
+    auto offset = i.InputRegister32(0);                         \
+    auto length = i.InputOperand32(1);                          \
+    __ Cmp(offset, length);                                     \
+    auto ool = new (zone()) OutOfLineLoadInteger(this, result); \
+    __ B(hs, ool->entry());                                     \
+    __ asm_instr(result, i.MemoryOperand(2));                   \
+    __ Bind(ool->exit());                                       \
+  } while (0)
+
+
+#define ASSEMBLE_CHECKED_STORE_FLOAT(width)                       \
+  do {                                                            \
+    auto offset = i.InputRegister32(0);                           \
+    auto length = i.InputOperand32(1);                            \
+    __ Cmp(offset, length);                                       \
+    Label done;                                                   \
+    __ B(hs, &done);                                              \
+    __ Str(i.InputFloat##width##Register(2), i.MemoryOperand(3)); \
+    __ Bind(&done);                                               \
+  } while (0)
+
+
+#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)           \
+  do {                                                      \
+    auto offset = i.InputRegister32(0);                     \
+    auto length = i.InputOperand32(1);                      \
+    __ Cmp(offset, length);                                 \
+    Label done;                                             \
+    __ B(hs, &done);                                        \
+    __ asm_instr(i.InputRegister32(2), i.MemoryOperand(3)); \
+    __ Bind(&done);                                         \
+  } while (0)
+
+
 #define ASSEMBLE_SHIFT(asm_instr, width)                                       \
   do {                                                                         \
     if (instr->InputAt(1)->IsRegister()) {                                     \
       __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0),       \
                    i.InputRegister##width(1));                                 \
     } else {                                                                   \
       int64_t imm = i.InputOperand##width(1).immediate().value();              \
       __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), imm); \
     }                                                                          \
   } while (0)
@@ skipping 433 matching lines @@
         temp = scope.AcquireX();
         lr_status = kLRHasBeenSaved;
         __ Push(lr, temp);  // Need to push a pair
       }
       __ RecordWrite(object, index, value, lr_status, mode);
       if (csp.is(masm()->StackPointer())) {
         __ Pop(temp, lr);
       }
       break;
     }
+    case kCheckedLoadInt8:
+      ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsb);
+      break;
+    case kCheckedLoadUint8:
+      ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrb);
+      break;
+    case kCheckedLoadInt16:
+      ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsh);
+      break;
+    case kCheckedLoadUint16:
+      ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrh);
+      break;
+    case kCheckedLoadWord32:
+      ASSEMBLE_CHECKED_LOAD_INTEGER(Ldr);
+      break;
+    case kCheckedLoadFloat32:
+      ASSEMBLE_CHECKED_LOAD_FLOAT(32);
+      break;
+    case kCheckedLoadFloat64:
+      ASSEMBLE_CHECKED_LOAD_FLOAT(64);
+      break;
+    case kCheckedStoreWord8:
+      ASSEMBLE_CHECKED_STORE_INTEGER(Strb);
+      break;
+    case kCheckedStoreWord16:
+      ASSEMBLE_CHECKED_STORE_INTEGER(Strh);
+      break;
+    case kCheckedStoreWord32:
+      ASSEMBLE_CHECKED_STORE_INTEGER(Str);
+      break;
+    case kCheckedStoreFloat32:
+      ASSEMBLE_CHECKED_STORE_FLOAT(32);
+      break;
+    case kCheckedStoreFloat64:
+      ASSEMBLE_CHECKED_STORE_FLOAT(64);
+      break;
   }
 }
 
 
 // Assemble branches after this instruction.
 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
   Arm64OperandConverter i(this, instr);
   Label* tlabel = branch->true_label;
   Label* flabel = branch->false_label;
   switch (branch->condition) {
@@ skipping 134 matching lines @@
     case kUnsignedGreaterThan:
       cc = hi;
       break;
     case kOverflow:
       cc = vs;
       break;
     case kNotOverflow:
       cc = vc;
       break;
   }
-  __ bind(&check);
+  __ Bind(&check);
   __ Cset(reg, cc);
   __ Bind(&done);
 }
 
 
 void CodeGenerator::AssembleDeoptimizerCall(int deoptimization_id) {
   Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
       isolate(), deoptimization_id, Deoptimizer::LAZY);
   __ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
 }
@@ skipping 232 matching lines @@
     }
   }
   MarkLazyDeoptSite();
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8