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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/bits.h" | 5 #include "src/base/bits.h" |
6 #include "src/compiler/instruction-selector-impl.h" | 6 #include "src/compiler/instruction-selector-impl.h" |
7 #include "src/compiler/node-matchers.h" | 7 #include "src/compiler/node-matchers.h" |
8 | 8 |
9 namespace v8 { | 9 namespace v8 { |
10 namespace internal { | 10 namespace internal { |
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343 if (g.CanBeImmediate(index, opcode)) { | 343 if (g.CanBeImmediate(index, opcode)) { |
344 Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), NULL, | 344 Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), NULL, |
345 g.UseRegister(base), g.UseImmediate(index), g.UseRegister(value)); | 345 g.UseRegister(base), g.UseImmediate(index), g.UseRegister(value)); |
346 } else { | 346 } else { |
347 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), NULL, | 347 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), NULL, |
348 g.UseRegister(base), g.UseRegister(index), g.UseRegister(value)); | 348 g.UseRegister(base), g.UseRegister(index), g.UseRegister(value)); |
349 } | 349 } |
350 } | 350 } |
351 | 351 |
352 | 352 |
| 353 void InstructionSelector::VisitCheckedLoad(Node* node) { |
| 354 MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); |
| 355 MachineType typ = TypeOf(OpParameter<MachineType>(node)); |
| 356 ArmOperandGenerator g(this); |
| 357 Node* const buffer = node->InputAt(0); |
| 358 Node* const offset = node->InputAt(1); |
| 359 Node* const length = node->InputAt(2); |
| 360 ArchOpcode opcode; |
| 361 switch (rep) { |
| 362 case kRepWord8: |
| 363 opcode = typ == kTypeInt32 ? kCheckedLoadInt8 : kCheckedLoadUint8; |
| 364 break; |
| 365 case kRepWord16: |
| 366 opcode = typ == kTypeInt32 ? kCheckedLoadInt16 : kCheckedLoadUint16; |
| 367 break; |
| 368 case kRepWord32: |
| 369 opcode = kCheckedLoadWord32; |
| 370 break; |
| 371 case kRepFloat32: |
| 372 opcode = kCheckedLoadFloat32; |
| 373 break; |
| 374 case kRepFloat64: |
| 375 opcode = kCheckedLoadFloat64; |
| 376 break; |
| 377 default: |
| 378 UNREACHABLE(); |
| 379 return; |
| 380 } |
| 381 InstructionOperand* offset_operand = g.UseRegister(offset); |
| 382 InstructionOperand* length_operand = g.CanBeImmediate(length, kArmCmp) |
| 383 ? g.UseImmediate(length) |
| 384 : g.UseRegister(length); |
| 385 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), |
| 386 g.DefineAsRegister(node), offset_operand, length_operand, |
| 387 g.UseRegister(buffer), offset_operand); |
| 388 } |
| 389 |
| 390 |
| 391 void InstructionSelector::VisitCheckedStore(Node* node) { |
| 392 MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); |
| 393 ArmOperandGenerator g(this); |
| 394 Node* const buffer = node->InputAt(0); |
| 395 Node* const offset = node->InputAt(1); |
| 396 Node* const length = node->InputAt(2); |
| 397 Node* const value = node->InputAt(3); |
| 398 ArchOpcode opcode; |
| 399 switch (rep) { |
| 400 case kRepWord8: |
| 401 opcode = kCheckedStoreWord8; |
| 402 break; |
| 403 case kRepWord16: |
| 404 opcode = kCheckedStoreWord16; |
| 405 break; |
| 406 case kRepWord32: |
| 407 opcode = kCheckedStoreWord32; |
| 408 break; |
| 409 case kRepFloat32: |
| 410 opcode = kCheckedStoreFloat32; |
| 411 break; |
| 412 case kRepFloat64: |
| 413 opcode = kCheckedStoreFloat64; |
| 414 break; |
| 415 default: |
| 416 UNREACHABLE(); |
| 417 return; |
| 418 } |
| 419 InstructionOperand* offset_operand = g.UseRegister(offset); |
| 420 InstructionOperand* length_operand = g.CanBeImmediate(length, kArmCmp) |
| 421 ? g.UseImmediate(length) |
| 422 : g.UseRegister(length); |
| 423 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), nullptr, |
| 424 offset_operand, length_operand, g.UseRegister(value), |
| 425 g.UseRegister(buffer), offset_operand); |
| 426 } |
| 427 |
| 428 |
353 namespace { | 429 namespace { |
354 | 430 |
355 void EmitBic(InstructionSelector* selector, Node* node, Node* left, | 431 void EmitBic(InstructionSelector* selector, Node* node, Node* left, |
356 Node* right) { | 432 Node* right) { |
357 ArmOperandGenerator g(selector); | 433 ArmOperandGenerator g(selector); |
358 InstructionCode opcode = kArmBic; | 434 InstructionCode opcode = kArmBic; |
359 InstructionOperand* value_operand; | 435 InstructionOperand* value_operand; |
360 InstructionOperand* shift_operand; | 436 InstructionOperand* shift_operand; |
361 if (TryMatchShift(selector, &opcode, right, &value_operand, &shift_operand)) { | 437 if (TryMatchShift(selector, &opcode, right, &value_operand, &shift_operand)) { |
362 selector->Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left), | 438 selector->Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left), |
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1257 MachineOperatorBuilder::kFloat64Ceil | | 1333 MachineOperatorBuilder::kFloat64Ceil | |
1258 MachineOperatorBuilder::kFloat64RoundTruncate | | 1334 MachineOperatorBuilder::kFloat64RoundTruncate | |
1259 MachineOperatorBuilder::kFloat64RoundTiesAway; | 1335 MachineOperatorBuilder::kFloat64RoundTiesAway; |
1260 } | 1336 } |
1261 return flags; | 1337 return flags; |
1262 } | 1338 } |
1263 | 1339 |
1264 } // namespace compiler | 1340 } // namespace compiler |
1265 } // namespace internal | 1341 } // namespace internal |
1266 } // namespace v8 | 1342 } // namespace v8 |
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