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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 6 | 6 |
| 7 #include "src/v8.h" | 7 #include "src/v8.h" |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_MIPS | 9 #if V8_TARGET_ARCH_MIPS |
| 10 | 10 |
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| 1542 } | 1542 } |
| 1543 } | 1543 } |
| 1544 } | 1544 } |
| 1545 | 1545 |
| 1546 if (bd == PROTECT) { | 1546 if (bd == PROTECT) { |
| 1547 nop(); | 1547 nop(); |
| 1548 } | 1548 } |
| 1549 } | 1549 } |
| 1550 | 1550 |
| 1551 | 1551 |
| 1552 void MacroAssembler::Move(FPURegister dst, float imm) { |
| 1553 li(at, Operand(bit_cast<int32_t>(imm))); |
| 1554 mtc1(at, dst); |
| 1555 } |
| 1556 |
| 1557 |
| 1552 void MacroAssembler::Move(FPURegister dst, double imm) { | 1558 void MacroAssembler::Move(FPURegister dst, double imm) { |
| 1553 static const DoubleRepresentation minus_zero(-0.0); | 1559 static const DoubleRepresentation minus_zero(-0.0); |
| 1554 static const DoubleRepresentation zero(0.0); | 1560 static const DoubleRepresentation zero(0.0); |
| 1555 DoubleRepresentation value_rep(imm); | 1561 DoubleRepresentation value_rep(imm); |
| 1556 // Handle special values first. | 1562 // Handle special values first. |
| 1557 if (value_rep == zero && has_double_zero_reg_set_) { | 1563 if (value_rep == zero && has_double_zero_reg_set_) { |
| 1558 mov_d(dst, kDoubleRegZero); | 1564 mov_d(dst, kDoubleRegZero); |
| 1559 } else if (value_rep == minus_zero && has_double_zero_reg_set_) { | 1565 } else if (value_rep == minus_zero && has_double_zero_reg_set_) { |
| 1560 neg_d(dst, kDoubleRegZero); | 1566 neg_d(dst, kDoubleRegZero); |
| 1561 } else { | 1567 } else { |
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| 6279 } | 6285 } |
| 6280 if (mag.shift > 0) sra(result, result, mag.shift); | 6286 if (mag.shift > 0) sra(result, result, mag.shift); |
| 6281 srl(at, dividend, 31); | 6287 srl(at, dividend, 31); |
| 6282 Addu(result, result, Operand(at)); | 6288 Addu(result, result, Operand(at)); |
| 6283 } | 6289 } |
| 6284 | 6290 |
| 6285 | 6291 |
| 6286 } } // namespace v8::internal | 6292 } } // namespace v8::internal |
| 6287 | 6293 |
| 6288 #endif // V8_TARGET_ARCH_MIPS | 6294 #endif // V8_TARGET_ARCH_MIPS |
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