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Issue 76163003: MIPS: Properly initialize desc->origin in the MIPS assembler. (Closed) Base URL: https://github.com/v8/v8.git@gbl
Patch Set: Created 7 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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319 } 319 }
320 320
321 321
322 void Assembler::GetCode(CodeDesc* desc) { 322 void Assembler::GetCode(CodeDesc* desc) {
323 ASSERT(pc_ <= reloc_info_writer.pos()); // No overlap. 323 ASSERT(pc_ <= reloc_info_writer.pos()); // No overlap.
324 // Set up code descriptor. 324 // Set up code descriptor.
325 desc->buffer = buffer_; 325 desc->buffer = buffer_;
326 desc->buffer_size = buffer_size_; 326 desc->buffer_size = buffer_size_;
327 desc->instr_size = pc_offset(); 327 desc->instr_size = pc_offset();
328 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); 328 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
329 desc->origin = this;
329 } 330 }
330 331
331 332
332 void Assembler::Align(int m) { 333 void Assembler::Align(int m) {
333 ASSERT(m >= 4 && IsPowerOf2(m)); 334 ASSERT(m >= 4 && IsPowerOf2(m));
334 while ((pc_offset() & (m - 1)) != 0) { 335 while ((pc_offset() & (m - 1)) != 0) {
335 nop(); 336 nop();
336 } 337 }
337 } 338 }
338 339
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2301 } 2302 }
2302 2303
2303 if (patched) { 2304 if (patched) {
2304 CPU::FlushICache(pc+2, sizeof(Address)); 2305 CPU::FlushICache(pc+2, sizeof(Address));
2305 } 2306 }
2306 } 2307 }
2307 2308
2308 } } // namespace v8::internal 2309 } } // namespace v8::internal
2309 2310
2310 #endif // V8_TARGET_ARCH_MIPS 2311 #endif // V8_TARGET_ARCH_MIPS
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