Revert of Add SSSE3 acceleration for S32_D16_filter_DXDY

src/opts/opts_check_x86.cpp

Index: src/opts/opts_check_x86.cpp
diff --git a/src/opts/opts_check_x86.cpp b/src/opts/opts_check_x86.cpp
index 34aae928eb18e07d17669bb3cd3cc4b37c52831d..8fec2ba69c528040cbb02c2bd603bd1e00120a6f 100644
--- a/src/opts/opts_check_x86.cpp
+++ b/src/opts/opts_check_x86.cpp
@@ -149,27 +149,26 @@
     if (!supports_simd(SK_CPU_SSE_LEVEL_SSE2)) {
         return;
     }
-    const bool ssse3 = supports_simd(SK_CPU_SSE_LEVEL_SSSE3);
 
     /* Check fSampleProc32 */
     if (fSampleProc32 == S32_opaque_D32_filter_DX) {
-        if (ssse3) {
+        if (supports_simd(SK_CPU_SSE_LEVEL_SSSE3)) {
             fSampleProc32 = S32_opaque_D32_filter_DX_SSSE3;
         } else {
             fSampleProc32 = S32_opaque_D32_filter_DX_SSE2;
         }
     } else if (fSampleProc32 == S32_opaque_D32_filter_DXDY) {
-        if (ssse3) {
+        if (supports_simd(SK_CPU_SSE_LEVEL_SSSE3)) {
             fSampleProc32 = S32_opaque_D32_filter_DXDY_SSSE3;
         }
     } else if (fSampleProc32 == S32_alpha_D32_filter_DX) {
-        if (ssse3) {
+        if (supports_simd(SK_CPU_SSE_LEVEL_SSSE3)) {
             fSampleProc32 = S32_alpha_D32_filter_DX_SSSE3;
         } else {
             fSampleProc32 = S32_alpha_D32_filter_DX_SSE2;
         }
     } else if (fSampleProc32 == S32_alpha_D32_filter_DXDY) {
-        if (ssse3) {
+        if (supports_simd(SK_CPU_SSE_LEVEL_SSSE3)) {
             fSampleProc32 = S32_alpha_D32_filter_DXDY_SSSE3;
         }
     }
@@ -177,8 +176,6 @@
     /* Check fSampleProc16 */
     if (fSampleProc16 == S32_D16_filter_DX) {
         fSampleProc16 = S32_D16_filter_DX_SSE2;
-    } else if (ssse3 && fSampleProc16 == S32_D16_filter_DXDY) {
-        fSampleProc16 = S32_D16_filter_DXDY_SSSE3;
     }
 
     /* Check fMatrixProc */