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Side by Side Diff: tests_lit/llvm2ice_tests/vector-arith.ll

Issue 756543002: Subzero: Fix new issues after the LLVM 3.5 merge. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Also use `llvm-config --system-libs` Created 6 years ago
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1 ; This test checks support for vector arithmetic. 1 ; This test checks support for vector arithmetic.
2 2
3 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer
4 ; doesn't know how to symbolize non-section-local functions.
5 ; The newer LLVM 3.6 one does work, but watch out for other bugs.
6
7 ; RUN: %p2i -i %s -a -O2 --verbose none\
8 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s
9 ; RUN: %p2i -i %s -a -O2 --verbose none \ 3 ; RUN: %p2i -i %s -a -O2 --verbose none \
10 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ 4 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \
11 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s 5 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
12 ; RUN: %p2i -i %s -a -Om1 --verbose none \ 6 ; RUN: %p2i -i %s -a -Om1 --verbose none \
13 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ 7 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \
14 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s 8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
15 ; RUN: %p2i -i %s -a -O2 -mattr=sse4.1 --verbose none \ 9 ; RUN: %p2i -i %s -a -O2 -mattr=sse4.1 --verbose none \
16 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ 10 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \
17 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \ 11 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \
18 ; RUN: | FileCheck --check-prefix=SSE41 %s 12 ; RUN: | FileCheck --check-prefix=SSE41 %s
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51 ret <4 x float> %res 45 ret <4 x float> %res
52 ; CHECK-LABEL: test_fdiv: 46 ; CHECK-LABEL: test_fdiv:
53 ; CHECK: divps 47 ; CHECK: divps
54 } 48 }
55 49
56 define <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) { 50 define <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) {
57 entry: 51 entry:
58 %res = frem <4 x float> %arg0, %arg1 52 %res = frem <4 x float> %arg0, %arg1
59 ret <4 x float> %res 53 ret <4 x float> %res
60 ; CHECK-LABEL: test_frem: 54 ; CHECK-LABEL: test_frem:
61 ; CALLTARGETS-LABEL: test_frem: 55 ; CHECK: fmodf
62 ; CHECK: -4 56 ; CHECK: fmodf
63 ; CHECK: -4 57 ; CHECK: fmodf
64 ; CHECK: -4 58 ; CHECK: fmodf
65 ; CHECK: -4
66 ; CALLTARGETS: fmodf
67 ; CALLTARGETS: fmodf
68 ; CALLTARGETS: fmodf
69 ; CALLTARGETS: fmodf
70 } 59 }
71 60
72 define <16 x i8> @test_add_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 61 define <16 x i8> @test_add_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {
73 entry: 62 entry:
74 %res = add <16 x i8> %arg0, %arg1 63 %res = add <16 x i8> %arg0, %arg1
75 ret <16 x i8> %res 64 ret <16 x i8> %res
76 ; CHECK-LABEL: test_add_v16i8: 65 ; CHECK-LABEL: test_add_v16i8:
77 ; CHECK: paddb 66 ; CHECK: paddb
78 } 67 }
79 68
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570 define <4 x i32> @test_srem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 559 define <4 x i32> @test_srem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {
571 entry: 560 entry:
572 %res = srem <4 x i32> %arg0, %arg1 561 %res = srem <4 x i32> %arg0, %arg1
573 ret <4 x i32> %res 562 ret <4 x i32> %res
574 ; CHECK-LABEL: test_srem_v4i32: 563 ; CHECK-LABEL: test_srem_v4i32:
575 ; CHECK: idiv 564 ; CHECK: idiv
576 ; CHECK: idiv 565 ; CHECK: idiv
577 ; CHECK: idiv 566 ; CHECK: idiv
578 ; CHECK: idiv 567 ; CHECK: idiv
579 } 568 }
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