[turbofan] put late ssa deconstruction in register allocator behind a flag

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 82 matching lines @@
   return false;
 }
 
 
 #endif
 
 
 LiveRange::LiveRange(int id, Zone* zone)
     : id_(id),
       spilled_(false),
+      is_phi_(false),
+      is_non_loop_phi_(false),
       kind_(UNALLOCATED_REGISTERS),
       assigned_register_(kInvalidAssignment),
       last_interval_(NULL),
       first_interval_(NULL),
       first_pos_(NULL),
       parent_(NULL),
       next_(NULL),
       current_interval_(NULL),
       last_processed_use_(NULL),
       current_hint_operand_(NULL),
@@ skipping 1043 matching lines @@
           gap->GetOrCreateParallelMove(GapInstruction::START, code_zone());
       const ZoneList<MoveOperands>* move_operands = move->move_operands();
       for (int i = 0; i < move_operands->length(); ++i) {
         MoveOperands* cur = &move_operands->at(i);
         if (cur->IsIgnored()) continue;
         InstructionOperand* from = cur->source();
         InstructionOperand* to = cur->destination();
         InstructionOperand* hint = to;
         if (to->IsUnallocated()) {
           int to_vreg = UnallocatedOperand::cast(to)->virtual_register();
-          if (live->Contains(to_vreg)) {
-            Define(curr_position, to, from);
-            live->Remove(to_vreg);
+          LiveRange* to_range = LiveRangeFor(to_vreg);
+          if (to_range->is_phi()) {
+            DCHECK(!FLAG_turbo_delay_ssa_decon);
+            if (to_range->is_non_loop_phi()) {
+              hint = to_range->current_hint_operand();
+            }
           } else {
-            cur->Eliminate();
-            continue;
+            if (live->Contains(to_vreg)) {
+              Define(curr_position, to, from);
+              live->Remove(to_vreg);
+            } else {
+              cur->Eliminate();
+              continue;
+            }
           }
         } else {
           Define(curr_position, to, from);
         }
         Use(block_start_position, curr_position, from, hint);
         if (from->IsUnallocated()) {
           live->Add(UnallocatedOperand::cast(from)->virtual_register());
         }
       }
     } else {
@@ skipping 59 matching lines @@
           }
         }
         Use(block_start_position, curr_position.InstructionEnd(), temp, NULL);
         Define(curr_position, temp, NULL);
       }
     }
   }
 }
 
 
-void RegisterAllocator::ProcessPhis(const InstructionBlock* block) {
+void RegisterAllocator::ResolvePhis(const InstructionBlock* block) {
   for (auto phi : block->phis()) {
     auto output = phi->output();
     int phi_vreg = phi->virtual_register();
+    if (!FLAG_turbo_delay_ssa_decon) {
+      for (size_t i = 0; i < phi->operands().size(); ++i) {
+        InstructionBlock* cur_block =
+            code()->InstructionBlockAt(block->predecessors()[i]);
+        // The gap move must be added without any special processing as in
+        // the AddConstraintsGapMove.
+        code()->AddGapMove(cur_block->last_instruction_index() - 1,
+                           phi->inputs()[i], output);
+        DCHECK(!InstructionAt(cur_block->last_instruction_index())
+                    ->HasPointerMap());
+      }
+    }
     LiveRange* live_range = LiveRangeFor(phi_vreg);
     BlockStartInstruction* block_start =
         code()->GetBlockStart(block->rpo_number());
     block_start->GetOrCreateParallelMove(GapInstruction::BEFORE, code_zone())
         ->AddMove(output, live_range->GetSpillOperand(), code_zone());
     live_range->SetSpillStartIndex(block->first_instruction_index());
+    // We use the phi-ness of some nodes in some later heuristics.
+    live_range->set_is_phi(true);
+    if (!block->IsLoopHeader()) {
+      live_range->set_is_non_loop_phi(true);
+    }
   }
 }
 
 
 void RegisterAllocator::MeetRegisterConstraints() {
   for (auto block : code()->instruction_blocks()) {
-    ProcessPhis(block);
     MeetRegisterConstraints(block);
   }
 }
 
 
+void RegisterAllocator::ResolvePhis() {
+  // Process the blocks in reverse order.
+  for (auto i = code()->instruction_blocks().rbegin();
+       i != code()->instruction_blocks().rend(); ++i) {
+    ResolvePhis(*i);
+  }
+}
+
+
 ParallelMove* RegisterAllocator::GetConnectingParallelMove(
     LifetimePosition pos) {
   int index = pos.InstructionIndex();
   if (code()->IsGapAt(index)) {
     GapInstruction* gap = code()->GapAt(index);
     return gap->GetOrCreateParallelMove(
         pos.IsInstructionStart() ? GapInstruction::START : GapInstruction::END,
         code_zone());
   }
   int gap_pos = pos.IsInstructionStart() ? (index - 1) : (index + 1);
@@ skipping 184 matching lines @@
 };
 
 }  // namespace
 
 
 void RegisterAllocator::ResolveControlFlow() {
   // Lazily linearize live ranges in memory for fast lookup.
   LiveRangeFinder finder(*this);
   for (auto block : code()->instruction_blocks()) {
     if (CanEagerlyResolveControlFlow(block)) continue;
-    // resolve phis
-    for (auto phi : block->phis()) {
-      auto* block_bound =
-          finder.ArrayFor(phi->virtual_register())->FindSucc(block);
-      auto phi_output = block_bound->range_->CreateAssignedOperand(code_zone());
-      phi->output()->ConvertTo(phi_output->kind(), phi_output->index());
-      size_t pred_index = 0;
-      for (auto pred : block->predecessors()) {
-        const InstructionBlock* pred_block = code()->InstructionBlockAt(pred);
-        auto* pred_bound =
-            finder.ArrayFor(phi->operands()[pred_index])->FindPred(pred_block);
-        auto pred_op = pred_bound->range_->CreateAssignedOperand(code_zone());
-        phi->inputs()[pred_index] = pred_op;
-        ResolveControlFlow(block, phi_output, pred_block, pred_op);
-        pred_index++;
+    if (FLAG_turbo_delay_ssa_decon) {
+      // resolve phis
+      for (auto phi : block->phis()) {
+        auto* block_bound =
+            finder.ArrayFor(phi->virtual_register())->FindSucc(block);
+        auto phi_output =
+            block_bound->range_->CreateAssignedOperand(code_zone());
+        phi->output()->ConvertTo(phi_output->kind(), phi_output->index());
+        size_t pred_index = 0;
+        for (auto pred : block->predecessors()) {
+          const InstructionBlock* pred_block = code()->InstructionBlockAt(pred);
+          auto* pred_bound = finder.ArrayFor(phi->operands()[pred_index])
+                                 ->FindPred(pred_block);
+          auto pred_op = pred_bound->range_->CreateAssignedOperand(code_zone());
+          phi->inputs()[pred_index] = pred_op;
+          ResolveControlFlow(block, phi_output, pred_block, pred_op);
+          pred_index++;
+        }
       }
     }
     BitVector* live = live_in_sets_[block->rpo_number().ToInt()];
     BitVector::Iterator iterator(live);
     while (!iterator.Done()) {
       auto* array = finder.ArrayFor(iterator.Current());
       for (auto pred : block->predecessors()) {
         FindResult result;
         const auto* pred_block = code()->InstructionBlockAt(pred);
         array->Find(block, pred_block, &result);
@@ skipping 47 matching lines @@
 
     // Process the instructions in reverse order, generating and killing
     // live values.
     ProcessInstructions(block, live);
     // All phi output operands are killed by this block.
     for (auto phi : block->phis()) {
       // The live range interval already ends at the first instruction of the
       // block.
       int phi_vreg = phi->virtual_register();
       live->Remove(phi_vreg);
+      if (!FLAG_turbo_delay_ssa_decon) {
+        InstructionOperand* hint = NULL;
+        InstructionOperand* phi_operand = NULL;
+        GapInstruction* gap =
+            GetLastGap(code()->InstructionBlockAt(block->predecessors()[0]));
+        ParallelMove* move =
+            gap->GetOrCreateParallelMove(GapInstruction::START, code_zone());
+        for (int j = 0; j < move->move_operands()->length(); ++j) {
+          InstructionOperand* to = move->move_operands()->at(j).destination();
+          if (to->IsUnallocated() &&
+              UnallocatedOperand::cast(to)->virtual_register() == phi_vreg) {
+            hint = move->move_operands()->at(j).source();
+            phi_operand = to;
+            break;
+          }
+        }
+        DCHECK(hint != NULL);
+        LifetimePosition block_start = LifetimePosition::FromInstructionIndex(
+            block->first_instruction_index());
+        Define(block_start, phi_operand, hint);
+      }
     }
 
     // Now live is live_in for this block except not including values live
     // out on backward successor edges.
     live_in_sets_[block_id] = live;
 
     if (block->IsLoopHeader()) {
       // Add a live range stretching from the first loop instruction to the last
       // for each value live on entry to the header.
       BitVector::Iterator iterator(live);
@@ skipping 24 matching lines @@
       // TODO(bmeurer): This is a horrible hack to make sure that for constant
       // live ranges, every use requires the constant to be in a register.
       // Without this hack, all uses with "any" policy would get the constant
       // operand assigned.
       LiveRange* range = live_ranges_[i];
       if (range->HasAllocatedSpillOperand() &&
           range->GetSpillOperand()->IsConstant()) {
         for (UsePosition* pos = range->first_pos(); pos != NULL;
              pos = pos->next_) {
           pos->register_beneficial_ = true;
-          pos->requires_reg_ = true;
+          // TODO(dcarney): should the else case assert requires_reg_ == false?
+          // Can't mark phis as needing a register.
+          if (!code()
+                   ->InstructionAt(pos->pos().InstructionIndex())
+                   ->IsGapMoves()) {
+            pos->requires_reg_ = true;
+          }
         }
       }
     }
   }
 }
 
 
 bool RegisterAllocator::ExistsUseWithoutDefinition() {
   bool found = false;
   BitVector::Iterator iterator(live_in_sets_[0]);
@@ skipping 800 matching lines @@
   } else {
     DCHECK(range->Kind() == GENERAL_REGISTERS);
     assigned_registers_->Add(reg);
   }
   range->set_assigned_register(reg, code_zone());
 }
 
 }
 }
 }  // namespace v8::internal::compiler