[turbofan]: Port lea changes to ia32

test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 namespace {
 
 // Immediates (random subset).
 static const int32_t kImmediates[] = {
     kMinInt, -42, -1, 0,  1,  2,    3,      4,          5,
     6,       7,   8,  16, 42, 0xff, 0xffff, 0x0f0f0f0f, kMaxInt};
 
 }  // namespace
 
 
 TEST_F(InstructionSelectorTest, Int32AddWithParameter) {
   StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
   m.Return(m.Int32Add(m.Parameter(0), m.Parameter(1)));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
-  EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
+  EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
 }
 
 
 TEST_F(InstructionSelectorTest, Int32AddWithImmediate) {
   TRACED_FOREACH(int32_t, imm, kImmediates) {
     {
       StreamBuilder m(this, kMachInt32, kMachInt32);
       m.Return(m.Int32Add(m.Parameter(0), m.Int32Constant(imm)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
-      EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
-      ASSERT_EQ(2U, s[0]->InputCount());
-      EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
+      EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
+      if (imm == 0) {
+        ASSERT_EQ(1U, s[0]->InputCount());
+      } else {
+        ASSERT_EQ(2U, s[0]->InputCount());
+        EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
+      }
     }
     {
       StreamBuilder m(this, kMachInt32, kMachInt32);
       m.Return(m.Int32Add(m.Int32Constant(imm), m.Parameter(0)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
-      EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
-      ASSERT_EQ(2U, s[0]->InputCount());
-      EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
+      EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
+      if (imm == 0) {
+        ASSERT_EQ(1U, s[0]->InputCount());
+      } else {
+        ASSERT_EQ(2U, s[0]->InputCount());
+        EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
+      }
     }
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Int32SubWithParameter) {
   StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
   m.Return(m.Int32Sub(m.Parameter(0), m.Parameter(1)));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
@@ skipping 46 matching lines @@
 
 
 TEST_F(InstructionSelectorTest, BetterLeftOperandTestAddBinop) {
   StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
   Node* param1 = m.Parameter(0);
   Node* param2 = m.Parameter(1);
   Node* add = m.Int32Add(param1, param2);
   m.Return(m.Int32Add(add, param1));
   Stream s = m.Build();
   ASSERT_EQ(2U, s.size());
-  EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
+  EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
-  EXPECT_EQ(s.ToVreg(param2), s.ToVreg(s[0]->InputAt(0)));
+  EXPECT_EQ(s.ToVreg(param1), s.ToVreg(s[0]->InputAt(0)));
+  EXPECT_EQ(s.ToVreg(param2), s.ToVreg(s[0]->InputAt(1)));
+  ASSERT_EQ(2U, s[1]->InputCount());
+  EXPECT_EQ(s.ToVreg(param1), s.ToVreg(s[0]->InputAt(0)));
 }
 
 
 TEST_F(InstructionSelectorTest, BetterLeftOperandTestMulBinop) {
   StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
   Node* param1 = m.Parameter(0);
   Node* param2 = m.Parameter(1);
   Node* mul = m.Int32Mul(param1, param2);
   m.Return(m.Int32Mul(mul, param1));
   Stream s = m.Build();
   ASSERT_EQ(2U, s.size());
   EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
   EXPECT_EQ(s.ToVreg(param2), s.ToVreg(s[0]->InputAt(0)));
+  EXPECT_EQ(s.ToVreg(param1), s.ToVreg(s[0]->InputAt(1)));
 }
 
 
 // -----------------------------------------------------------------------------
 // Conversions.
 
 
 TEST_F(InstructionSelectorTest, ChangeUint32ToFloat64WithParameter) {
   StreamBuilder m(this, kMachFloat64, kMachUint32);
   m.Return(m.ChangeUint32ToFloat64(m.Parameter(0)));
@@ skipping 153 matching lines @@
 
 // -----------------------------------------------------------------------------
 // AddressingMode for loads and stores.
 
 
 class AddressingModeUnitTest : public InstructionSelectorTest {
  public:
   AddressingModeUnitTest() : m(NULL) { Reset(); }
   ~AddressingModeUnitTest() { delete m; }
 
-  void Run(Node* base, Node* index, AddressingMode mode) {
-    Node* load = m->Load(kMachInt32, base, index);
-    m->Store(kMachInt32, base, index, load);
+  void Run(Node* base, Node* load_index, Node* store_index,
+           AddressingMode mode) {
+    Node* load = m->Load(kMachInt32, base, load_index);
+    m->Store(kMachInt32, base, store_index, load);
     m->Return(m->Int32Constant(0));
     Stream s = m->Build();
     ASSERT_EQ(2U, s.size());
     EXPECT_EQ(mode, s[0]->addressing_mode());
     EXPECT_EQ(mode, s[1]->addressing_mode());
   }
 
   Node* zero;
   Node* null_ptr;
   Node* non_zero;
@@ skipping 15 matching lines @@
     scales[1] = m->Int32Constant(2);
     scales[2] = m->Int32Constant(4);
     scales[3] = m->Int32Constant(8);
   }
 };
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MR) {
   Node* base = base_reg;
   Node* index = zero;
-  Run(base, index, kMode_MR);
+  Run(base, index, index, kMode_MR);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MRI) {
   Node* base = base_reg;
   Node* index = non_zero;
-  Run(base, index, kMode_MRI);
+  Run(base, index, index, kMode_MRI);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MR1) {
   Node* base = base_reg;
   Node* index = index_reg;
-  Run(base, index, kMode_MR1);
+  Run(base, index, index, kMode_MR1);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MRN) {
   AddressingMode expected[] = {kMode_MR1, kMode_MR2, kMode_MR4, kMode_MR8};
   for (size_t i = 0; i < arraysize(scales); ++i) {
     Reset();
     Node* base = base_reg;
-    Node* index = m->Int32Mul(index_reg, scales[i]);
-    Run(base, index, expected[i]);
+    Node* load_index = m->Int32Mul(index_reg, scales[i]);
+    Node* store_index = m->Int32Mul(index_reg, scales[i]);
+    Run(base, load_index, store_index, expected[i]);
   }
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MR1I) {
   Node* base = base_reg;
-  Node* index = m->Int32Add(index_reg, non_zero);
-  Run(base, index, kMode_MR1I);
+  Node* load_index = m->Int32Add(index_reg, non_zero);
+  Node* store_index = m->Int32Add(index_reg, non_zero);
+  Run(base, load_index, store_index, kMode_MR1I);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MRNI) {
   AddressingMode expected[] = {kMode_MR1I, kMode_MR2I, kMode_MR4I, kMode_MR8I};
   for (size_t i = 0; i < arraysize(scales); ++i) {
     Reset();
     Node* base = base_reg;
-    Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
-    Run(base, index, expected[i]);
+    Node* load_index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
+    Node* store_index =
+        m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
+    Run(base, load_index, store_index, expected[i]);
   }
 }
 
 
-TEST_F(AddressingModeUnitTest, AddressingMode_M1) {
+TEST_F(AddressingModeUnitTest, AddressingMode_M1ToMR) {
   Node* base = null_ptr;
   Node* index = index_reg;
-  Run(base, index, kMode_M1);
+  // M1 maps to MR
+  Run(base, index, index, kMode_MR);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MN) {
-  AddressingMode expected[] = {kMode_M1, kMode_M2, kMode_M4, kMode_M8};
+  AddressingMode expected[] = {kMode_MR, kMode_M2, kMode_M4, kMode_M8};
   for (size_t i = 0; i < arraysize(scales); ++i) {
     Reset();
     Node* base = null_ptr;
-    Node* index = m->Int32Mul(index_reg, scales[i]);
-    Run(base, index, expected[i]);
+    Node* load_index = m->Int32Mul(index_reg, scales[i]);
+    Node* store_index = m->Int32Mul(index_reg, scales[i]);
+    Run(base, load_index, store_index, expected[i]);
   }
 }
 
 
-TEST_F(AddressingModeUnitTest, AddressingMode_M1I) {
+TEST_F(AddressingModeUnitTest, AddressingMode_M1IToMRI) {
   Node* base = null_ptr;
-  Node* index = m->Int32Add(index_reg, non_zero);
-  Run(base, index, kMode_M1I);
+  Node* load_index = m->Int32Add(index_reg, non_zero);
+  Node* store_index = m->Int32Add(index_reg, non_zero);
+  // M1I maps to MRI
+  Run(base, load_index, store_index, kMode_MRI);
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MNI) {
-  AddressingMode expected[] = {kMode_M1I, kMode_M2I, kMode_M4I, kMode_M8I};
+  AddressingMode expected[] = {kMode_MRI, kMode_M2I, kMode_M4I, kMode_M8I};
   for (size_t i = 0; i < arraysize(scales); ++i) {
     Reset();
     Node* base = null_ptr;
-    Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
-    Run(base, index, expected[i]);
+    Node* load_index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
+    Node* store_index =
+        m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
+    Run(base, load_index, store_index, expected[i]);
   }
 }
 
 
 TEST_F(AddressingModeUnitTest, AddressingMode_MI) {
   Node* bases[] = {null_ptr, non_zero};
   Node* indices[] = {zero, non_zero};
   for (size_t i = 0; i < arraysize(bases); ++i) {
     for (size_t j = 0; j < arraysize(indices); ++j) {
       Reset();
       Node* base = bases[i];
       Node* index = indices[j];
-      Run(base, index, kMode_MI);
+      Run(base, index, index, kMode_MI);
     }
   }
 }
 
 
 // -----------------------------------------------------------------------------
 // Multiplication.
 
 
 namespace {
 
 struct MultParam {
   int value;
   bool lea_expected;
   AddressingMode addressing_mode;
 };
 
 
 std::ostream& operator<<(std::ostream& os, const MultParam& m) {
   return os << m.value << "." << m.lea_expected << "." << m.addressing_mode;
 }
 
 
 const MultParam kMultParams[] = {{-1, false, kMode_None},
                                  {0, false, kMode_None},
-                                 {1, true, kMode_M1},
+                                 {1, true, kMode_MR},
                                  {2, true, kMode_M2},
                                  {3, true, kMode_MR2},
                                  {4, true, kMode_M4},
                                  {5, true, kMode_MR4},
                                  {6, false, kMode_None},
                                  {7, false, kMode_None},
                                  {8, true, kMode_M8},
                                  {9, true, kMode_MR8},
                                  {10, false, kMode_None},
                                  {11, false, kMode_None}};
@@ skipping 13 matching lines @@
       return 3U;
     case kMode_M1I:
     case kMode_M2I:
     case kMode_M4I:
     case kMode_M8I:
       return 2U;
     case kMode_MR1:
     case kMode_MR2:
     case kMode_MR4:
     case kMode_MR8:
+    case kMode_MRI:
       return 2U;
     case kMode_M1:
     case kMode_M2:
     case kMode_M4:
     case kMode_M8:
+    case kMode_MI:
+    case kMode_MR:
       return 1U;
     default:
       UNREACHABLE();
       return 0U;
   }
 }
 
 
-static AddressingMode AddressingModeForAddMult(const MultParam& m) {
+static AddressingMode AddressingModeForAddMult(int32_t imm,
+                                               const MultParam& m) {
+  if (imm == 0) return m.addressing_mode;
   switch (m.addressing_mode) {
     case kMode_MR1:
       return kMode_MR1I;
     case kMode_MR2:
       return kMode_MR2I;
     case kMode_MR4:
       return kMode_MR4I;
     case kMode_MR8:
       return kMode_MR8I;
     case kMode_M1:
       return kMode_M1I;
     case kMode_M2:
       return kMode_M2I;
     case kMode_M4:
       return kMode_M4I;
     case kMode_M8:
       return kMode_M8I;
+    case kMode_MR:
+      return kMode_MRI;
     default:
       UNREACHABLE();
       return kMode_None;
   }
 }
 
 
 TEST_P(InstructionSelectorMultTest, Mult32) {
   const MultParam m_param = GetParam();
   StreamBuilder m(this, kMachInt32, kMachInt32);
@@ skipping 19 matching lines @@
     const MultParam m_param = GetParam();
     StreamBuilder m(this, kMachInt32, kMachInt32);
     Node* param = m.Parameter(0);
     Node* mult = m.Int32Add(m.Int32Mul(param, m.Int32Constant(m_param.value)),
                             m.Int32Constant(imm));
     m.Return(mult);
     Stream s = m.Build();
     if (m_param.lea_expected) {
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
-      EXPECT_EQ(AddressingModeForAddMult(m_param), s[0]->addressing_mode());
+      EXPECT_EQ(AddressingModeForAddMult(imm, m_param),
+                s[0]->addressing_mode());
       unsigned input_count = InputCountForLea(s[0]->addressing_mode());
       ASSERT_EQ(input_count, s[0]->InputCount());
-      ASSERT_EQ(InstructionOperand::IMMEDIATE,
-                s[0]->InputAt(input_count - 1)->kind());
-      EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(input_count - 1)));
+      if (imm != 0) {
+        ASSERT_EQ(InstructionOperand::IMMEDIATE,
+                  s[0]->InputAt(input_count - 1)->kind());
+        EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(input_count - 1)));
+      }
     } else {
       ASSERT_EQ(2U, s.size());
       EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
-      EXPECT_EQ(kIA32Add, s[1]->arch_opcode());
+      EXPECT_EQ(kIA32Lea, s[1]->arch_opcode());
     }
   }
 }
 
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMultTest,
                         ::testing::ValuesIn(kMultParams));
 
 
 TEST_F(InstructionSelectorTest, Int32MulHigh) {
@@ skipping 43 matching lines @@
     EXPECT_EQ(kSSEFloat64Add, s[0]->arch_opcode());
     EXPECT_EQ(kSSEFloat64Mul, s[1]->arch_opcode());
     EXPECT_EQ(kSSEFloat64Sub, s[2]->arch_opcode());
     EXPECT_EQ(kSSEFloat64Div, s[3]->arch_opcode());
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8