MIPS: [turbofan] Clean up and factor out branch generation logic.

src/compiler/mips64/code-generator-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties-inl.h"
 #include "src/mips/macro-assembler-mips.h"
@@ skipping 459 matching lines @@
   }
 }
 
 
 #define UNSUPPORTED_COND(opcode, condition)                                  \
   OFStream out(stdout);                                                      \
   out << "Unsupported " << #opcode << " condition: \"" << condition << "\""; \
   UNIMPLEMENTED();
 
 // Assembles branches after an instruction.
-void CodeGenerator::AssembleArchBranch(Instruction* instr,
-                                       FlagsCondition condition) {
+void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
   MipsOperandConverter i(this, instr);
   Label* tlabel = branch->true_label;
   Label* flabel = branch->false_label;
   Condition cc = kNoCondition;
 
   // MIPS does not have condition code flags, so compare and branch are
   // implemented differently than on the other arch's. The compare operations
   // emit mips psuedo-instructions, which are handled here by branch
   // instructions that do the actual comparison. Essential that the input
   // registers to compare psuedo-op are not modified before this branch op, as
@@ skipping 84 matching lines @@
       case kUnsignedGreaterThan:
         cc = hi;
         break;
       default:
         UNSUPPORTED_COND(kMips64Cmp, branch->condition);
         break;
     }
     __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
-    __ bind(&done);
 
   } else if (instr->arch_opcode() == kMips64Cmp32) {
     switch (branch->condition) {
       case kEqual:
         cc = eq;
         break;
       case kNotEqual:
         cc = ne;
         break;
       case kSignedLessThan:
@@ skipping 50 matching lines @@
           __ Dext(i.InputRegister(1), i.InputRegister(1), 0, 32);
         }
         break;
       default:
         UNSUPPORTED_COND(kMips64Cmp, branch->condition);
         break;
     }
     __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
-    __ bind(&done);
   } else if (instr->arch_opcode() == kMips64CmpD) {
     // TODO(dusmil) optimize unordered checks to use less instructions
     // even if we have to unfold BranchF macro.
     Label* nan = flabel;
     switch (branch->condition) {
       case kUnorderedEqual:
         cc = eq;
         break;
       case kUnorderedNotEqual:
         cc = ne;
@@ skipping 14 matching lines @@
         nan = tlabel;
         break;
       default:
         UNSUPPORTED_COND(kMips64CmpD, branch->condition);
         break;
     }
     __ BranchF(tlabel, nan, cc, i.InputDoubleRegister(0),
                i.InputDoubleRegister(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
-    __ bind(&done);
-
   } else {
     PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
            instr->arch_opcode());
     UNIMPLEMENTED();
   }
 }
 
 
 void CodeGenerator::AssembleArchJump(BasicBlock::RpoNumber target) {
   if (!IsNextInAssemblyOrder(target)) __ Branch(GetLabel(target));
@@ skipping 512 matching lines @@
     }
   }
   MarkLazyDeoptSite();
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8