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| 1 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===// | 1 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===// |
| 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 3 // for details. All rights reserved. Use of this source code is governed by a | 3 // for details. All rights reserved. Use of this source code is governed by a |
| 4 // BSD-style license that can be found in the LICENSE file. | 4 // BSD-style license that can be found in the LICENSE file. |
| 5 // | 5 // |
| 6 // Modified by the Subzero authors. | 6 // Modified by the Subzero authors. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // The Subzero Code Generator | 10 // The Subzero Code Generator |
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| 53 const Constant *Imm) { | 53 const Constant *Imm) { |
| 54 // We should make this much lighter-weight. E.g., just record the const pool | 54 // We should make this much lighter-weight. E.g., just record the const pool |
| 55 // entry ID. | 55 // entry ID. |
| 56 std::string Buffer; | 56 std::string Buffer; |
| 57 llvm::raw_string_ostream StrBuf(Buffer); | 57 llvm::raw_string_ostream StrBuf(Buffer); |
| 58 Type Ty = Imm->getType(); | 58 Type Ty = Imm->getType(); |
| 59 assert(llvm::isa<ConstantFloat>(Imm) || llvm::isa<ConstantDouble>(Imm)); | 59 assert(llvm::isa<ConstantFloat>(Imm) || llvm::isa<ConstantDouble>(Imm)); |
| 60 StrBuf << ".L$" << Ty << "$" << Imm->getPoolEntryID(); | 60 StrBuf << ".L$" << Ty << "$" << Imm->getPoolEntryID(); |
| 61 const RelocOffsetT Offset = 0; | 61 const RelocOffsetT Offset = 0; |
| 62 const bool SuppressMangling = true; | 62 const bool SuppressMangling = true; |
| 63 Constant *Sym = | 63 Constant *Sym = Ctx->getConstantSym(Offset, StrBuf.str(), SuppressMangling); |
| 64 Ctx->getConstantSym(Ty, Offset, StrBuf.str(), SuppressMangling); | |
| 65 AssemblerFixup *Fixup = x86::DisplacementRelocation::create( | 64 AssemblerFixup *Fixup = x86::DisplacementRelocation::create( |
| 66 Asm, FK_Abs_4, llvm::cast<ConstantRelocatable>(Sym)); | 65 Asm, FK_Abs_4, llvm::cast<ConstantRelocatable>(Sym)); |
| 67 return x86::Address::Absolute(Fixup); | 66 return x86::Address::Absolute(Fixup); |
| 68 } | 67 } |
| 69 | 68 |
| 70 AssemblerX86::~AssemblerX86() { | 69 AssemblerX86::~AssemblerX86() { |
| 71 #ifndef NDEBUG | 70 #ifndef NDEBUG |
| 72 for (const Label *Label : CfgNodeLabels) { | 71 for (const Label *Label : CfgNodeLabels) { |
| 73 Label->FinalCheck(); | 72 Label->FinalCheck(); |
| 74 } | 73 } |
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| 953 // Broadcast low lane into other three lanes. | 952 // Broadcast low lane into other three lanes. |
| 954 shufps(dst, dst, Immediate(0x0)); | 953 shufps(dst, dst, Immediate(0x0)); |
| 955 } | 954 } |
| 956 | 955 |
| 957 void AssemblerX86::shufps(XmmRegister dst, XmmRegister src, | 956 void AssemblerX86::shufps(XmmRegister dst, XmmRegister src, |
| 958 const Immediate &imm) { | 957 const Immediate &imm) { |
| 959 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 958 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 960 EmitUint8(0x0F); | 959 EmitUint8(0x0F); |
| 961 EmitUint8(0xC6); | 960 EmitUint8(0xC6); |
| 962 EmitXmmRegisterOperand(dst, src); | 961 EmitXmmRegisterOperand(dst, src); |
| 963 assert(imm.is_uint8()); | 962 assert(imm.is_int8()); |
| 964 EmitUint8(imm.value()); | 963 EmitUint8(imm.value()); |
| 965 } | 964 } |
| 966 | 965 |
| 967 void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src, | 966 void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src, |
| 968 const Immediate &imm) { | 967 const Immediate &imm) { |
| 969 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 968 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 970 EmitUint8(0x66); | 969 EmitUint8(0x66); |
| 971 EmitUint8(0x0F); | 970 EmitUint8(0x0F); |
| 972 EmitUint8(0x70); | 971 EmitUint8(0x70); |
| 973 EmitXmmRegisterOperand(dst, src); | 972 EmitXmmRegisterOperand(dst, src); |
| 974 assert(imm.is_uint8()); | 973 assert(imm.is_int8()); |
| 975 EmitUint8(imm.value()); | 974 EmitUint8(imm.value()); |
| 976 } | 975 } |
| 977 | 976 |
| 978 void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, const Address &src, | 977 void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, const Address &src, |
| 979 const Immediate &imm) { | 978 const Immediate &imm) { |
| 980 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 979 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 981 EmitUint8(0x66); | 980 EmitUint8(0x66); |
| 982 EmitUint8(0x0F); | 981 EmitUint8(0x0F); |
| 983 EmitUint8(0x70); | 982 EmitUint8(0x70); |
| 984 EmitOperand(dst, src); | 983 EmitOperand(dst, src); |
| 985 assert(imm.is_uint8()); | 984 assert(imm.is_int8()); |
| 986 EmitUint8(imm.value()); | 985 EmitUint8(imm.value()); |
| 987 } | 986 } |
| 988 | 987 |
| 989 void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src, | 988 void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src, |
| 990 const Immediate &imm) { | 989 const Immediate &imm) { |
| 991 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 990 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 992 EmitUint8(0x0F); | 991 EmitUint8(0x0F); |
| 993 EmitUint8(0xC6); | 992 EmitUint8(0xC6); |
| 994 EmitXmmRegisterOperand(dst, src); | 993 EmitXmmRegisterOperand(dst, src); |
| 995 assert(imm.is_uint8()); | 994 assert(imm.is_int8()); |
| 996 EmitUint8(imm.value()); | 995 EmitUint8(imm.value()); |
| 997 } | 996 } |
| 998 | 997 |
| 999 void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, const Address &src, | 998 void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, const Address &src, |
| 1000 const Immediate &imm) { | 999 const Immediate &imm) { |
| 1001 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1000 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1002 EmitUint8(0x0F); | 1001 EmitUint8(0x0F); |
| 1003 EmitUint8(0xC6); | 1002 EmitUint8(0xC6); |
| 1004 EmitOperand(dst, src); | 1003 EmitOperand(dst, src); |
| 1005 assert(imm.is_uint8()); | 1004 assert(imm.is_int8()); |
| 1006 EmitUint8(imm.value()); | 1005 EmitUint8(imm.value()); |
| 1007 } | 1006 } |
| 1008 | 1007 |
| 1009 void AssemblerX86::minpd(XmmRegister dst, XmmRegister src) { | 1008 void AssemblerX86::minpd(XmmRegister dst, XmmRegister src) { |
| 1010 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1009 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1011 EmitUint8(0x66); | 1010 EmitUint8(0x66); |
| 1012 EmitUint8(0x0F); | 1011 EmitUint8(0x0F); |
| 1013 EmitUint8(0x5D); | 1012 EmitUint8(0x5D); |
| 1014 EmitXmmRegisterOperand(dst, src); | 1013 EmitXmmRegisterOperand(dst, src); |
| 1015 } | 1014 } |
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| 1030 EmitXmmRegisterOperand(dst, dst); | 1029 EmitXmmRegisterOperand(dst, dst); |
| 1031 } | 1030 } |
| 1032 | 1031 |
| 1033 void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src, | 1032 void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src, |
| 1034 const Immediate &imm) { | 1033 const Immediate &imm) { |
| 1035 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1034 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1036 EmitUint8(0x66); | 1035 EmitUint8(0x66); |
| 1037 EmitUint8(0x0F); | 1036 EmitUint8(0x0F); |
| 1038 EmitUint8(0xC6); | 1037 EmitUint8(0xC6); |
| 1039 EmitXmmRegisterOperand(dst, src); | 1038 EmitXmmRegisterOperand(dst, src); |
| 1040 assert(imm.is_uint8()); | 1039 assert(imm.is_int8()); |
| 1041 EmitUint8(imm.value()); | 1040 EmitUint8(imm.value()); |
| 1042 } | 1041 } |
| 1043 | 1042 |
| 1044 void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst, | 1043 void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst, |
| 1045 XmmRegister src) { | 1044 XmmRegister src) { |
| 1046 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1045 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1047 EmitUint8(0x0F); | 1046 EmitUint8(0x0F); |
| 1048 EmitUint8(0x5B); | 1047 EmitUint8(0x5B); |
| 1049 EmitXmmRegisterOperand(dst, src); | 1048 EmitXmmRegisterOperand(dst, src); |
| 1050 } | 1049 } |
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| 1225 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1224 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1226 EmitUint8(0x66); | 1225 EmitUint8(0x66); |
| 1227 EmitUint8(0x0F); | 1226 EmitUint8(0x0F); |
| 1228 EmitUint8(0x54); | 1227 EmitUint8(0x54); |
| 1229 EmitXmmRegisterOperand(dst, src); | 1228 EmitXmmRegisterOperand(dst, src); |
| 1230 } | 1229 } |
| 1231 | 1230 |
| 1232 void AssemblerX86::insertps(Type Ty, XmmRegister dst, XmmRegister src, | 1231 void AssemblerX86::insertps(Type Ty, XmmRegister dst, XmmRegister src, |
| 1233 const Immediate &imm) { | 1232 const Immediate &imm) { |
| 1234 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1233 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1235 assert(imm.is_uint8()); | 1234 assert(imm.is_int8()); |
| 1236 assert(isVectorFloatingType(Ty)); | 1235 assert(isVectorFloatingType(Ty)); |
| 1237 (void)Ty; | 1236 (void)Ty; |
| 1238 EmitUint8(0x66); | 1237 EmitUint8(0x66); |
| 1239 EmitUint8(0x0F); | 1238 EmitUint8(0x0F); |
| 1240 EmitUint8(0x3A); | 1239 EmitUint8(0x3A); |
| 1241 EmitUint8(0x21); | 1240 EmitUint8(0x21); |
| 1242 EmitXmmRegisterOperand(dst, src); | 1241 EmitXmmRegisterOperand(dst, src); |
| 1243 EmitUint8(imm.value()); | 1242 EmitUint8(imm.value()); |
| 1244 } | 1243 } |
| 1245 | 1244 |
| 1246 void AssemblerX86::insertps(Type Ty, XmmRegister dst, const Address &src, | 1245 void AssemblerX86::insertps(Type Ty, XmmRegister dst, const Address &src, |
| 1247 const Immediate &imm) { | 1246 const Immediate &imm) { |
| 1248 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1247 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1249 assert(imm.is_uint8()); | 1248 assert(imm.is_int8()); |
| 1250 assert(isVectorFloatingType(Ty)); | 1249 assert(isVectorFloatingType(Ty)); |
| 1251 (void)Ty; | 1250 (void)Ty; |
| 1252 EmitUint8(0x66); | 1251 EmitUint8(0x66); |
| 1253 EmitUint8(0x0F); | 1252 EmitUint8(0x0F); |
| 1254 EmitUint8(0x3A); | 1253 EmitUint8(0x3A); |
| 1255 EmitUint8(0x21); | 1254 EmitUint8(0x21); |
| 1256 EmitOperand(dst, src); | 1255 EmitOperand(dst, src); |
| 1257 EmitUint8(imm.value()); | 1256 EmitUint8(imm.value()); |
| 1258 } | 1257 } |
| 1259 | 1258 |
| 1260 void AssemblerX86::pinsr(Type Ty, XmmRegister dst, GPRRegister src, | 1259 void AssemblerX86::pinsr(Type Ty, XmmRegister dst, GPRRegister src, |
| 1261 const Immediate &imm) { | 1260 const Immediate &imm) { |
| 1262 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1261 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1263 assert(imm.is_uint8()); | 1262 assert(imm.is_int8()); |
| 1264 if (Ty == IceType_i16) { | 1263 if (Ty == IceType_i16) { |
| 1265 EmitUint8(0x66); | 1264 EmitUint8(0x66); |
| 1266 EmitUint8(0x0F); | 1265 EmitUint8(0x0F); |
| 1267 EmitUint8(0xC4); | 1266 EmitUint8(0xC4); |
| 1268 EmitXmmRegisterOperand(dst, XmmRegister(src)); | 1267 EmitXmmRegisterOperand(dst, XmmRegister(src)); |
| 1269 EmitUint8(imm.value()); | 1268 EmitUint8(imm.value()); |
| 1270 } else { | 1269 } else { |
| 1271 EmitUint8(0x66); | 1270 EmitUint8(0x66); |
| 1272 EmitUint8(0x0F); | 1271 EmitUint8(0x0F); |
| 1273 EmitUint8(0x3A); | 1272 EmitUint8(0x3A); |
| 1274 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22); | 1273 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22); |
| 1275 EmitXmmRegisterOperand(dst, XmmRegister(src)); | 1274 EmitXmmRegisterOperand(dst, XmmRegister(src)); |
| 1276 EmitUint8(imm.value()); | 1275 EmitUint8(imm.value()); |
| 1277 } | 1276 } |
| 1278 } | 1277 } |
| 1279 | 1278 |
| 1280 void AssemblerX86::pinsr(Type Ty, XmmRegister dst, const Address &src, | 1279 void AssemblerX86::pinsr(Type Ty, XmmRegister dst, const Address &src, |
| 1281 const Immediate &imm) { | 1280 const Immediate &imm) { |
| 1282 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1281 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1283 assert(imm.is_uint8()); | 1282 assert(imm.is_int8()); |
| 1284 if (Ty == IceType_i16) { | 1283 if (Ty == IceType_i16) { |
| 1285 EmitUint8(0x66); | 1284 EmitUint8(0x66); |
| 1286 EmitUint8(0x0F); | 1285 EmitUint8(0x0F); |
| 1287 EmitUint8(0xC4); | 1286 EmitUint8(0xC4); |
| 1288 EmitOperand(dst, src); | 1287 EmitOperand(dst, src); |
| 1289 EmitUint8(imm.value()); | 1288 EmitUint8(imm.value()); |
| 1290 } else { | 1289 } else { |
| 1291 EmitUint8(0x66); | 1290 EmitUint8(0x66); |
| 1292 EmitUint8(0x0F); | 1291 EmitUint8(0x0F); |
| 1293 EmitUint8(0x3A); | 1292 EmitUint8(0x3A); |
| 1294 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22); | 1293 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22); |
| 1295 EmitOperand(dst, src); | 1294 EmitOperand(dst, src); |
| 1296 EmitUint8(imm.value()); | 1295 EmitUint8(imm.value()); |
| 1297 } | 1296 } |
| 1298 } | 1297 } |
| 1299 | 1298 |
| 1300 void AssemblerX86::pextr(Type Ty, GPRRegister dst, XmmRegister src, | 1299 void AssemblerX86::pextr(Type Ty, GPRRegister dst, XmmRegister src, |
| 1301 const Immediate &imm) { | 1300 const Immediate &imm) { |
| 1302 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1301 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1303 assert(imm.is_uint8()); | 1302 assert(imm.is_int8()); |
| 1304 if (Ty == IceType_i16) { | 1303 if (Ty == IceType_i16) { |
| 1305 EmitUint8(0x66); | 1304 EmitUint8(0x66); |
| 1306 EmitUint8(0x0F); | 1305 EmitUint8(0x0F); |
| 1307 EmitUint8(0xC5); | 1306 EmitUint8(0xC5); |
| 1308 EmitXmmRegisterOperand(XmmRegister(dst), src); | 1307 EmitXmmRegisterOperand(XmmRegister(dst), src); |
| 1309 EmitUint8(imm.value()); | 1308 EmitUint8(imm.value()); |
| 1310 } else { | 1309 } else { |
| 1311 EmitUint8(0x66); | 1310 EmitUint8(0x66); |
| 1312 EmitUint8(0x0F); | 1311 EmitUint8(0x0F); |
| 1313 EmitUint8(0x3A); | 1312 EmitUint8(0x3A); |
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| 1515 EmitOperand(reg, addr); | 1514 EmitOperand(reg, addr); |
| 1516 } | 1515 } |
| 1517 | 1516 |
| 1518 void AssemblerX86::test(Type Ty, GPRRegister reg, const Immediate &immediate) { | 1517 void AssemblerX86::test(Type Ty, GPRRegister reg, const Immediate &immediate) { |
| 1519 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1518 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1520 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) | 1519 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) |
| 1521 // we only test the byte register to keep the encoding short. | 1520 // we only test the byte register to keep the encoding short. |
| 1522 // This is legal even if the register had high bits set since | 1521 // This is legal even if the register had high bits set since |
| 1523 // this only sets flags registers based on the "AND" of the two operands, | 1522 // this only sets flags registers based on the "AND" of the two operands, |
| 1524 // and the immediate had zeros at those high bits. | 1523 // and the immediate had zeros at those high bits. |
| 1525 if (immediate.is_uint8() && reg < 4) { | 1524 if (immediate.is_int8() && reg < 4) { |
| 1526 // Use zero-extended 8-bit immediate. | 1525 // Use zero-extended 8-bit immediate. |
| 1527 if (reg == RegX8632::Encoded_Reg_eax) { | 1526 if (reg == RegX8632::Encoded_Reg_eax) { |
| 1528 EmitUint8(0xA8); | 1527 EmitUint8(0xA8); |
| 1529 } else { | 1528 } else { |
| 1530 EmitUint8(0xF6); | 1529 EmitUint8(0xF6); |
| 1531 EmitUint8(0xC0 + reg); | 1530 EmitUint8(0xC0 + reg); |
| 1532 } | 1531 } |
| 1533 EmitUint8(immediate.value() & 0xFF); | 1532 EmitUint8(immediate.value() & 0xFF); |
| 1534 } else if (reg == RegX8632::Encoded_Reg_eax) { | 1533 } else if (reg == RegX8632::Encoded_Reg_eax) { |
| 1535 // Use short form if the destination is EAX. | 1534 // Use short form if the destination is EAX. |
| 1536 if (Ty == IceType_i16) | 1535 if (Ty == IceType_i16) |
| 1537 EmitOperandSizeOverride(); | 1536 EmitOperandSizeOverride(); |
| 1538 EmitUint8(0xA9); | 1537 EmitUint8(0xA9); |
| 1539 EmitImmediate(Ty, immediate); | 1538 EmitImmediate(Ty, immediate); |
| 1540 } else { | 1539 } else { |
| 1541 if (Ty == IceType_i16) | 1540 if (Ty == IceType_i16) |
| 1542 EmitOperandSizeOverride(); | 1541 EmitOperandSizeOverride(); |
| 1543 EmitUint8(0xF7); | 1542 EmitUint8(0xF7); |
| 1544 EmitRegisterOperand(0, reg); | 1543 EmitRegisterOperand(0, reg); |
| 1545 EmitImmediate(Ty, immediate); | 1544 EmitImmediate(Ty, immediate); |
| 1546 } | 1545 } |
| 1547 } | 1546 } |
| 1548 | 1547 |
| 1549 void AssemblerX86::test(Type Ty, const Address &addr, | 1548 void AssemblerX86::test(Type Ty, const Address &addr, |
| 1550 const Immediate &immediate) { | 1549 const Immediate &immediate) { |
| 1551 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1550 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1552 // If the immediate is short, we only test the byte addr to keep the | 1551 // If the immediate is short, we only test the byte addr to keep the |
| 1553 // encoding short. | 1552 // encoding short. |
| 1554 if (immediate.is_uint8()) { | 1553 if (immediate.is_int8()) { |
| 1555 // Use zero-extended 8-bit immediate. | 1554 // Use zero-extended 8-bit immediate. |
| 1556 EmitUint8(0xF6); | 1555 EmitUint8(0xF6); |
| 1557 EmitOperand(0, addr); | 1556 EmitOperand(0, addr); |
| 1558 EmitUint8(immediate.value() & 0xFF); | 1557 EmitUint8(immediate.value() & 0xFF); |
| 1559 } else { | 1558 } else { |
| 1560 if (Ty == IceType_i16) | 1559 if (Ty == IceType_i16) |
| 1561 EmitOperandSizeOverride(); | 1560 EmitOperandSizeOverride(); |
| 1562 EmitUint8(0xF7); | 1561 EmitUint8(0xF7); |
| 1563 EmitOperand(0, addr); | 1562 EmitOperand(0, addr); |
| 1564 EmitImmediate(Ty, immediate); | 1563 EmitImmediate(Ty, immediate); |
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| 2521 assert(shifter == RegX8632::Encoded_Reg_ecx); | 2520 assert(shifter == RegX8632::Encoded_Reg_ecx); |
| 2522 (void)shifter; | 2521 (void)shifter; |
| 2523 if (Ty == IceType_i16) | 2522 if (Ty == IceType_i16) |
| 2524 EmitOperandSizeOverride(); | 2523 EmitOperandSizeOverride(); |
| 2525 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); | 2524 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); |
| 2526 EmitOperand(rm, operand); | 2525 EmitOperand(rm, operand); |
| 2527 } | 2526 } |
| 2528 | 2527 |
| 2529 } // end of namespace x86 | 2528 } // end of namespace x86 |
| 2530 } // end of namespace Ice | 2529 } // end of namespace Ice |
| OLD | NEW |