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Issue 735543003: Range feedback for binary integer operations. (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Address comments Created 6 years ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
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1927 static const intptr_t kSmiCidSource = kSmiCid << RawObject::kClassIdTagPos; 1927 static const intptr_t kSmiCidSource = kSmiCid << RawObject::kClassIdTagPos;
1928 1928
1929 LoadImmediate(TMP, reinterpret_cast<int32_t>(&kSmiCidSource) + 1); 1929 LoadImmediate(TMP, reinterpret_cast<int32_t>(&kSmiCidSource) + 1);
1930 tst(object, Operand(kSmiTagMask)); 1930 tst(object, Operand(kSmiTagMask));
1931 mov(TMP, Operand(object), NE); 1931 mov(TMP, Operand(object), NE);
1932 LoadClassId(result, TMP); 1932 LoadClassId(result, TMP);
1933 SmiTag(result); 1933 SmiTag(result);
1934 } 1934 }
1935 1935
1936 1936
1937 void Assembler::ComputeRange(Register result,
1938 Register value,
1939 Register scratch,
1940 Label* not_mint) {
1941 const Register hi = TMP;
1942 const Register lo = scratch;
1943
1944 Label done;
1945 mov(result, Operand(value, LSR, kBitsPerWord - 1));
1946 tst(value, Operand(kSmiTagMask));
1947 b(&done, EQ);
1948 CompareClassId(value, kMintCid, result);
1949 b(not_mint, NE);
1950 ldr(hi, FieldAddress(value, Mint::value_offset() + kWordSize));
1951 ldr(lo, FieldAddress(value, Mint::value_offset()));
1952 rsb(result, hi, Operand(ICData::kInt32RangeBit));
1953 cmp(hi, Operand(lo, ASR, kBitsPerWord - 1));
1954 b(&done, EQ);
1955 LoadImmediate(result, ICData::kUint32RangeBit); // Uint32
1956 tst(hi, Operand(hi));
1957 LoadImmediate(result, ICData::kInt64RangeBit, NE); // Int64
1958 Bind(&done);
1959 }
1960
1961
1962 void Assembler::UpdateRangeFeedback(Register value,
1963 intptr_t index,
1964 Register ic_data,
1965 Register scratch1,
1966 Register scratch2,
1967 Label* miss) {
1968 ASSERT(ICData::IsValidRangeFeedbackIndex(index));
1969 ComputeRange(scratch1, value, scratch2, miss);
1970 ldr(scratch2, FieldAddress(ic_data, ICData::range_feedback_offset()));
1971 orr(scratch2,
1972 scratch2,
1973 Operand(scratch1, LSL, ICData::kBitsPerRangeFeedback * index));
1974 str(scratch2, FieldAddress(ic_data, ICData::range_feedback_offset()));
1975 }
1976
1977
1937 static bool CanEncodeBranchOffset(int32_t offset) { 1978 static bool CanEncodeBranchOffset(int32_t offset) {
1938 ASSERT(Utils::IsAligned(offset, 4)); 1979 ASSERT(Utils::IsAligned(offset, 4));
1939 return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset); 1980 return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset);
1940 } 1981 }
1941 1982
1942 1983
1943 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) { 1984 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) {
1944 // The offset is off by 8 due to the way the ARM CPUs read PC. 1985 // The offset is off by 8 due to the way the ARM CPUs read PC.
1945 offset -= Instr::kPCReadOffset; 1986 offset -= Instr::kPCReadOffset;
1946 1987
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3580 3621
3581 3622
3582 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3623 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3583 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3624 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3584 return fpu_reg_names[reg]; 3625 return fpu_reg_names[reg];
3585 } 3626 }
3586 3627
3587 } // namespace dart 3628 } // namespace dart
3588 3629
3589 #endif // defined TARGET_ARCH_ARM 3630 #endif // defined TARGET_ARCH_ARM
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