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Issue 735033002: MIPS64: Prepare additonal code for turbofan landing. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 6 years, 1 month ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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956 case SPECIAL3: 956 case SPECIAL3:
957 switch (instr->FunctionFieldRaw()) { 957 switch (instr->FunctionFieldRaw()) {
958 case INS: { 958 case INS: {
959 Format(instr, "ins 'rt, 'rs, 'sa, 'ss2"); 959 Format(instr, "ins 'rt, 'rs, 'sa, 'ss2");
960 break; 960 break;
961 } 961 }
962 case EXT: { 962 case EXT: {
963 Format(instr, "ext 'rt, 'rs, 'sa, 'ss1"); 963 Format(instr, "ext 'rt, 'rs, 'sa, 'ss1");
964 break; 964 break;
965 } 965 }
966 case DEXT: {
967 Format(instr, "dext 'rt, 'rs, 'sa, 'ss1");
968 break;
969 }
966 default: 970 default:
967 UNREACHABLE(); 971 UNREACHABLE();
968 } 972 }
969 break; 973 break;
970 default: 974 default:
971 UNREACHABLE(); 975 UNREACHABLE();
972 } 976 }
973 return Instruction::kInstrSize; 977 return Instruction::kInstrSize;
974 } 978 }
975 979
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1495 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1499 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1496 } 1500 }
1497 } 1501 }
1498 1502
1499 1503
1500 #undef UNSUPPORTED 1504 #undef UNSUPPORTED
1501 1505
1502 } // namespace disasm 1506 } // namespace disasm
1503 1507
1504 #endif // V8_TARGET_ARCH_MIPS64 1508 #endif // V8_TARGET_ARCH_MIPS64
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