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Issue 735033002: MIPS64: Prepare additonal code for turbofan landing. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 6 years, 1 month ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_MIPS64 7 #if V8_TARGET_ARCH_MIPS64
8 8
9 #include "src/mips64/constants-mips64.h" 9 #include "src/mips64/constants-mips64.h"
10 10
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280 case CLZ: 280 case CLZ:
281 return kRegisterType; 281 return kRegisterType;
282 default: 282 default:
283 return kUnsupported; 283 return kUnsupported;
284 } 284 }
285 break; 285 break;
286 case SPECIAL3: 286 case SPECIAL3:
287 switch (FunctionFieldRaw()) { 287 switch (FunctionFieldRaw()) {
288 case INS: 288 case INS:
289 case EXT: 289 case EXT:
290 case DEXT:
290 return kRegisterType; 291 return kRegisterType;
291 default: 292 default:
292 return kUnsupported; 293 return kUnsupported;
293 } 294 }
294 break; 295 break;
295 case COP1: // Coprocessor instructions. 296 case COP1: // Coprocessor instructions.
296 switch (RsFieldRawNoAssert()) { 297 switch (RsFieldRawNoAssert()) {
297 case BC1: // Branch on coprocessor condition. 298 case BC1: // Branch on coprocessor condition.
298 case BC1EQZ: 299 case BC1EQZ:
299 case BC1NEZ: 300 case BC1NEZ:
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353 default: 354 default:
354 return kUnsupported; 355 return kUnsupported;
355 } 356 }
356 return kUnsupported; 357 return kUnsupported;
357 } 358 }
358 359
359 360
360 } } // namespace v8::internal 361 } } // namespace v8::internal
361 362
362 #endif // V8_TARGET_ARCH_MIPS64 363 #endif // V8_TARGET_ARCH_MIPS64
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