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Side by Side Diff: src/IceTargetLowering.cpp

Issue 733643005: Subzero: Use the linear-scan register allocator for Om1 as well. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Update/fix some comments Created 6 years, 1 month ago
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1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// 1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the skeleton of the TargetLowering class, 10 // This file implements the skeleton of the TargetLowering class,
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218 postLower(); 218 postLower();
219 219
220 Context.advanceCur(); 220 Context.advanceCur();
221 Context.advanceNext(); 221 Context.advanceNext();
222 } 222 }
223 223
224 // Drives register allocation, allowing all physical registers (except 224 // Drives register allocation, allowing all physical registers (except
225 // perhaps for the frame pointer) to be allocated. This set of 225 // perhaps for the frame pointer) to be allocated. This set of
226 // registers could potentially be parameterized if we want to restrict 226 // registers could potentially be parameterized if we want to restrict
227 // registers e.g. for performance testing. 227 // registers e.g. for performance testing.
228 void TargetLowering::regAlloc() { 228 void TargetLowering::regAlloc(RegAllocKind Kind) {
229 TimerMarker T(TimerStack::TT_regAlloc, Func); 229 TimerMarker T(TimerStack::TT_regAlloc, Func);
230 LinearScan LinearScan(Func); 230 LinearScan LinearScan(Func);
231 RegSetMask RegInclude = RegSet_None; 231 RegSetMask RegInclude = RegSet_None;
232 RegSetMask RegExclude = RegSet_None; 232 RegSetMask RegExclude = RegSet_None;
233 RegInclude |= RegSet_CallerSave; 233 RegInclude |= RegSet_CallerSave;
234 RegInclude |= RegSet_CalleeSave; 234 RegInclude |= RegSet_CalleeSave;
235 if (hasFramePointer()) 235 if (hasFramePointer())
236 RegExclude |= RegSet_FramePointer; 236 RegExclude |= RegSet_FramePointer;
237 LinearScan.initForGlobalAlloc(); 237 LinearScan.init(Kind);
238 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude); 238 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
239 LinearScan.scan(RegMask); 239 LinearScan.scan(RegMask);
240 } 240 }
241 241
242 TargetGlobalInitLowering * 242 TargetGlobalInitLowering *
243 TargetGlobalInitLowering::createLowering(TargetArch Target, 243 TargetGlobalInitLowering::createLowering(TargetArch Target,
244 GlobalContext *Ctx) { 244 GlobalContext *Ctx) {
245 // These statements can be #ifdef'd to specialize the code generator 245 // These statements can be #ifdef'd to specialize the code generator
246 // to a subset of the available targets. TODO: use CRTP. 246 // to a subset of the available targets. TODO: use CRTP.
247 if (Target == Target_X8632) 247 if (Target == Target_X8632)
248 return TargetGlobalInitX8632::create(Ctx); 248 return TargetGlobalInitX8632::create(Ctx);
249 #if 0 249 #if 0
250 if (Target == Target_X8664) 250 if (Target == Target_X8664)
251 return IceTargetGlobalInitX8664::create(Ctx); 251 return IceTargetGlobalInitX8664::create(Ctx);
252 if (Target == Target_ARM32) 252 if (Target == Target_ARM32)
253 return IceTargetGlobalInitARM32::create(Ctx); 253 return IceTargetGlobalInitARM32::create(Ctx);
254 if (Target == Target_ARM64) 254 if (Target == Target_ARM64)
255 return IceTargetGlobalInitARM64::create(Ctx); 255 return IceTargetGlobalInitARM64::create(Ctx);
256 #endif 256 #endif
257 llvm_unreachable("Unsupported target"); 257 llvm_unreachable("Unsupported target");
258 return NULL; 258 return NULL;
259 } 259 }
260 260
261 TargetGlobalInitLowering::~TargetGlobalInitLowering() {} 261 TargetGlobalInitLowering::~TargetGlobalInitLowering() {}
262 262
263 } // end of namespace Ice 263 } // end of namespace Ice
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