Subzero: Use the linear-scan register allocator for Om1 as well.

src/IceTargetLowering.h

 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLowering and LoweringContext
@@ skipping 177 matching lines @@
     RegSet_CalleeSave = 1 << 1,
     RegSet_StackPointer = 1 << 2,
     RegSet_FramePointer = 1 << 3,
     RegSet_All = ~RegSet_None
   };
   typedef uint32_t RegSetMask;
 
   virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
                                               RegSetMask Exclude) const = 0;
   virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0;
-  void regAlloc();
+  void regAlloc(RegAllocKind Kind);
 
   virtual void emitVariable(const Variable *Var) const = 0;
 
   // Performs target-specific argument lowering.
   virtual void lowerArguments() = 0;
 
   virtual void addProlog(CfgNode *Node) = 0;
   virtual void addEpilog(CfgNode *Node) = 0;
 
   virtual void emitConstants() const = 0;
@@ skipping 22 matching lines @@
   virtual void lowerStore(const InstStore *Inst) = 0;
   virtual void lowerSwitch(const InstSwitch *Inst) = 0;
   virtual void lowerUnreachable(const InstUnreachable *Inst) = 0;
 
   virtual void doAddressOptLoad() {}
   virtual void doAddressOptStore() {}
   virtual void randomlyInsertNop(float Probability) = 0;
   // This gives the target an opportunity to post-process the lowered
   // expansion before returning.  The primary intention is to do some
   // Register Manager activity as necessary, specifically to eagerly
   // allocate registers based on affinity and other factors.  The

[jvoung (off chromium), 2014/11/14 23:26:22]

Update the postLower comment?

[Jim Stichnoth, 2014/11/14 23:51:34]

Ewww.  That comment I think was a relic of the early idea of "multi-block
register allocation" which I abandoned.

   // simplest lowering does nothing here and leaves it all to a
   // subsequent global register allocation pass.
   virtual void postLower() {}
 
   Cfg *Func;
   GlobalContext *Ctx;
   bool HasComputedFrame;
   bool CallsReturnsTwice;
   // StackAdjustment keeps track of the current stack offset from its
   // natural location, as arguments are pushed for a function call.
@@ skipping 17 matching lines @@
   virtual void lower(const VariableDeclaration &Var) = 0;
 
 protected:
   TargetGlobalInitLowering(GlobalContext *Ctx) : Ctx(Ctx) {}
   GlobalContext *Ctx;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERING_H