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Issue 732663003: Process two 32-bit digits as one 64-bit digit in bigint absAdd intrinsic on x64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_X64_H_ 5 #ifndef VM_ASSEMBLER_X64_H_
6 #define VM_ASSEMBLER_X64_H_ 6 #define VM_ASSEMBLER_X64_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_x64.h directly; use assembler.h instead. 9 #error Do not include assembler_x64.h directly; use assembler.h instead.
10 #endif 10 #endif
(...skipping 539 matching lines...) Expand 10 before | Expand all | Expand 10 after
550 void addl(const Address& address, Register src); 550 void addl(const Address& address, Register src);
551 void adcl(Register dst, Register src); 551 void adcl(Register dst, Register src);
552 void adcl(Register dst, const Immediate& imm); 552 void adcl(Register dst, const Immediate& imm);
553 void adcl(Register dst, const Address& address); 553 void adcl(Register dst, const Address& address);
554 554
555 void addq(Register dst, Register src); 555 void addq(Register dst, Register src);
556 void addq(Register dst, const Immediate& imm); 556 void addq(Register dst, const Immediate& imm);
557 void addq(Register dst, const Address& address); 557 void addq(Register dst, const Address& address);
558 void addq(const Address& address, const Immediate& imm); 558 void addq(const Address& address, const Immediate& imm);
559 void addq(const Address& address, Register src); 559 void addq(const Address& address, Register src);
560 void adcq(Register dst, Register src);
561 void adcq(Register dst, const Immediate& imm);
562 void adcq(Register dst, const Address& address);
560 563
561 void cdq(); 564 void cdq();
562 void cqo(); 565 void cqo();
563 566
564 void idivl(Register reg); 567 void idivl(Register reg);
565 void divl(Register reg); 568 void divl(Register reg);
566 569
567 void idivq(Register reg); 570 void idivq(Register reg);
568 571
569 void imull(Register dst, Register src); 572 void imull(Register dst, Register src);
570 void imull(Register reg, const Immediate& imm); 573 void imull(Register reg, const Immediate& imm);
571 void mull(Register reg); 574 void mull(Register reg);
572 575
573 void imulq(Register dst, Register src); 576 void imulq(Register dst, Register src);
574 void imulq(Register dst, const Address& address); 577 void imulq(Register dst, const Address& address);
575 void imulq(Register dst, const Immediate& imm); 578 void imulq(Register dst, const Immediate& imm);
576 void MulImmediate(Register reg, const Immediate& imm, Register pp); 579 void MulImmediate(Register reg, const Immediate& imm, Register pp);
577 580
578 void subl(Register dst, Register src); 581 void subl(Register dst, Register src);
579 void subl(Register dst, const Address& address); 582 void subl(Register dst, const Address& address);
580 void sbbl(Register dst, Register src); 583 void sbbl(Register dst, Register src);
581 void sbbl(Register dst, const Immediate& imm); 584 void sbbl(Register dst, const Immediate& imm);
582 void sbbl(Register dst, const Address& address); 585 void sbbl(Register dst, const Address& address);
583 586
584 void subq(Register dst, Register src); 587 void subq(Register dst, Register src);
585 void subq(Register reg, const Immediate& imm); 588 void subq(Register reg, const Immediate& imm);
586 void subq(Register reg, const Address& address); 589 void subq(Register reg, const Address& address);
587 void subq(const Address& address, Register reg); 590 void subq(const Address& address, Register reg);
588 void subq(const Address& address, const Immediate& imm); 591 void subq(const Address& address, const Immediate& imm);
592 void sbbq(Register dst, Register src);
593 void sbbq(Register dst, const Immediate& imm);
594 void sbbq(Register dst, const Address& address);
589 595
590 void shll(Register reg, const Immediate& imm); 596 void shll(Register reg, const Immediate& imm);
591 void shll(Register operand, Register shifter); 597 void shll(Register operand, Register shifter);
592 void shrl(Register reg, const Immediate& imm); 598 void shrl(Register reg, const Immediate& imm);
593 void shrl(Register operand, Register shifter); 599 void shrl(Register operand, Register shifter);
594 void sarl(Register reg, const Immediate& imm); 600 void sarl(Register reg, const Immediate& imm);
595 void sarl(Register operand, Register shifter); 601 void sarl(Register operand, Register shifter);
596 void shldl(Register dst, Register src, const Immediate& imm); 602 void shldl(Register dst, Register src, const Immediate& imm);
597 603
598 void shlq(Register reg, const Immediate& imm); 604 void shlq(Register reg, const Immediate& imm);
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1178 } 1184 }
1179 1185
1180 1186
1181 inline void Assembler::EmitOperandSizeOverride() { 1187 inline void Assembler::EmitOperandSizeOverride() {
1182 EmitUint8(0x66); 1188 EmitUint8(0x66);
1183 } 1189 }
1184 1190
1185 } // namespace dart 1191 } // namespace dart
1186 1192
1187 #endif // VM_ASSEMBLER_X64_H_ 1193 #endif // VM_ASSEMBLER_X64_H_
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