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Issue 732663003: Process two 32-bit digits as one 64-bit digit in bigint absAdd intrinsic on x64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_X64_H_ 5 #ifndef VM_ASSEMBLER_X64_H_
6 #define VM_ASSEMBLER_X64_H_ 6 #define VM_ASSEMBLER_X64_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_x64.h directly; use assembler.h instead. 9 #error Do not include assembler_x64.h directly; use assembler.h instead.
10 #endif 10 #endif
(...skipping 528 matching lines...) Expand 10 before | Expand all | Expand 10 after
539 void orq(Register dst, const Immediate& imm); 539 void orq(Register dst, const Immediate& imm);
540 void OrImmediate(Register dst, const Immediate& imm, Register pp); 540 void OrImmediate(Register dst, const Immediate& imm, Register pp);
541 541
542 void xorq(Register dst, Register src); 542 void xorq(Register dst, Register src);
543 void xorq(Register dst, const Address& address); 543 void xorq(Register dst, const Address& address);
544 void xorq(const Address& dst, Register src); 544 void xorq(const Address& dst, Register src);
545 void xorq(Register dst, const Immediate& imm); 545 void xorq(Register dst, const Immediate& imm);
546 void XorImmediate(Register dst, const Immediate& imm, Register pp); 546 void XorImmediate(Register dst, const Immediate& imm, Register pp);
547 547
548 void addl(Register dst, Register src); 548 void addl(Register dst, Register src);
549 void addl(Register dst, const Immediate& imm);
549 void addl(Register dst, const Address& address); 550 void addl(Register dst, const Address& address);
550 void addl(const Address& address, Register src); 551 void addl(const Address& address, Register src);
551 void adcl(Register dst, Register src); 552 void adcl(Register dst, Register src);
552 void adcl(Register dst, const Immediate& imm); 553 void adcl(Register dst, const Immediate& imm);
553 void adcl(Register dst, const Address& address); 554 void adcl(Register dst, const Address& address);
554 555
555 void addq(Register dst, Register src); 556 void addq(Register dst, Register src);
556 void addq(Register dst, const Immediate& imm); 557 void addq(Register dst, const Immediate& imm);
557 void addq(Register dst, const Address& address); 558 void addq(Register dst, const Address& address);
558 void addq(const Address& address, const Immediate& imm); 559 void addq(const Address& address, const Immediate& imm);
559 void addq(const Address& address, Register src); 560 void addq(const Address& address, Register src);
561 void adcq(Register dst, Register src);
562 void adcq(Register dst, const Immediate& imm);
563 void adcq(Register dst, const Address& address);
560 564
561 void cdq(); 565 void cdq();
562 void cqo(); 566 void cqo();
563 567
564 void idivl(Register reg); 568 void idivl(Register reg);
565 void divl(Register reg); 569 void divl(Register reg);
566 570
567 void idivq(Register reg); 571 void idivq(Register reg);
568 572
569 void imull(Register dst, Register src); 573 void imull(Register dst, Register src);
570 void imull(Register reg, const Immediate& imm); 574 void imull(Register reg, const Immediate& imm);
571 void mull(Register reg); 575 void mull(Register reg);
572 576
573 void imulq(Register dst, Register src); 577 void imulq(Register dst, Register src);
574 void imulq(Register dst, const Address& address); 578 void imulq(Register dst, const Address& address);
575 void imulq(Register dst, const Immediate& imm); 579 void imulq(Register dst, const Immediate& imm);
576 void MulImmediate(Register reg, const Immediate& imm, Register pp); 580 void MulImmediate(Register reg, const Immediate& imm, Register pp);
577 581
578 void subl(Register dst, Register src); 582 void subl(Register dst, Register src);
583 void subl(Register dst, const Immediate& imm);
579 void subl(Register dst, const Address& address); 584 void subl(Register dst, const Address& address);
580 void sbbl(Register dst, Register src); 585 void sbbl(Register dst, Register src);
581 void sbbl(Register dst, const Immediate& imm); 586 void sbbl(Register dst, const Immediate& imm);
582 void sbbl(Register dst, const Address& address); 587 void sbbl(Register dst, const Address& address);
583 588
584 void subq(Register dst, Register src); 589 void subq(Register dst, Register src);
585 void subq(Register reg, const Immediate& imm); 590 void subq(Register reg, const Immediate& imm);
586 void subq(Register reg, const Address& address); 591 void subq(Register reg, const Address& address);
587 void subq(const Address& address, Register reg); 592 void subq(const Address& address, Register reg);
588 void subq(const Address& address, const Immediate& imm); 593 void subq(const Address& address, const Immediate& imm);
594 void sbbq(Register dst, Register src);
595 void sbbq(Register dst, const Immediate& imm);
596 void sbbq(Register dst, const Address& address);
589 597
590 void shll(Register reg, const Immediate& imm); 598 void shll(Register reg, const Immediate& imm);
591 void shll(Register operand, Register shifter); 599 void shll(Register operand, Register shifter);
592 void shrl(Register reg, const Immediate& imm); 600 void shrl(Register reg, const Immediate& imm);
593 void shrl(Register operand, Register shifter); 601 void shrl(Register operand, Register shifter);
594 void sarl(Register reg, const Immediate& imm); 602 void sarl(Register reg, const Immediate& imm);
595 void sarl(Register operand, Register shifter); 603 void sarl(Register operand, Register shifter);
596 void shldl(Register dst, Register src, const Immediate& imm); 604 void shldl(Register dst, Register src, const Immediate& imm);
597 605
598 void shlq(Register reg, const Immediate& imm); 606 void shlq(Register reg, const Immediate& imm);
(...skipping 579 matching lines...) Expand 10 before | Expand all | Expand 10 after
1178 } 1186 }
1179 1187
1180 1188
1181 inline void Assembler::EmitOperandSizeOverride() { 1189 inline void Assembler::EmitOperandSizeOverride() {
1182 EmitUint8(0x66); 1190 EmitUint8(0x66);
1183 } 1191 }
1184 1192
1185 } // namespace dart 1193 } // namespace dart
1186 1194
1187 #endif // VM_ASSEMBLER_X64_H_ 1195 #endif // VM_ASSEMBLER_X64_H_
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