Process two 32-bit digits as one 64-bit digit in bigint absAdd intrinsic on x64.

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 1809 matching lines @@
 
 void Assembler::addl(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(src);
   EmitOperandREX(dst, operand, REX_NONE);
   EmitUint8(0x03);
   EmitOperand(dst & 7, operand);
 }
 
 
+void Assembler::addl(Register dst, const Immediate& imm) {
+  ASSERT(imm.is_int32());
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitRegisterREX(dst, REX_NONE);
+  EmitComplex(0, Operand(dst), imm);
+}
+
+
 void Assembler::addl(Register dst, const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandREX(dst, address, REX_NONE);
   EmitUint8(0x03);
   EmitOperand(dst & 7, address);
 }
 
 
 void Assembler::addl(const Address& address, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ skipping 70 matching lines @@
 
 
 void Assembler::addq(const Address& address, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandREX(src, address, REX_W);
   EmitUint8(0x01);
   EmitOperand(src & 7, address);
 }
 
 
+void Assembler::adcq(Register dst, Register src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  Operand operand(src);
+  EmitOperandREX(dst, operand, REX_W);
+  EmitUint8(0x13);
+  EmitOperand(dst & 7, operand);
+}
+
+
+void Assembler::adcq(Register dst, const Immediate& imm) {
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(dst, REX_W);
+    EmitComplex(2, Operand(dst), imm);
+  } else {
+    movq(TMP, imm);
+    adcq(dst, TMP);
+  }
+}
+
+
+void Assembler::adcq(Register dst, const Address& address) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitOperandREX(dst, address, REX_W);
+  EmitUint8(0x13);
+  EmitOperand(dst & 7, address);
+}
+
+
 void Assembler::subl(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(src);
   EmitOperandREX(dst, operand, REX_NONE);
   EmitUint8(0x2B);
   EmitOperand(dst & 7, operand);
 }
 
 
+void Assembler::subl(Register dst, const Immediate& imm) {
+  ASSERT(imm.is_int32());
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitRegisterREX(dst, REX_NONE);
+  EmitComplex(3, Operand(dst), imm);
+}
+
+
 void Assembler::subl(Register dst, const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandREX(dst, address, REX_NONE);
   EmitUint8(0x2B);
   EmitOperand(dst & 7, address);
 }
 
 
 void Assembler::sbbl(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ skipping 172 matching lines @@
     AssemblerBuffer::EnsureCapacity ensured(&buffer_);
     EmitOperandREX(0, address, REX_W);
     EmitComplex(5, Operand(address), imm);
   } else {
     movq(TMP, imm);
     subq(address, TMP);
   }
 }
 
 
+void Assembler::sbbq(Register dst, Register src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  Operand operand(src);
+  EmitOperandREX(dst, operand, REX_W);
+  EmitUint8(0x1B);
+  EmitOperand(dst & 7, operand);
+}
+
+
+void Assembler::sbbq(Register dst, const Immediate& imm) {
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(dst, REX_W);
+    EmitComplex(3, Operand(dst), imm);
+  } else {
+    movq(TMP, imm);
+    sbbq(dst, TMP);
+  }
+}
+
+
+void Assembler::sbbq(Register dst, const Address& address) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitOperandREX(dst, address, REX_W);
+  EmitUint8(0x1B);
+  EmitOperand(dst & 7, address);
+}
+
+
 void Assembler::shll(Register reg, const Immediate& imm) {
   EmitGenericShift(false, 4, reg, imm);
 }
 
 
 void Assembler::shll(Register operand, Register shifter) {
   EmitGenericShift(false, 4, operand, shifter);
 }
 
 
@@ skipping 1643 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64