| Index: test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
|
| diff --git a/test/unittests/compiler/mips/instruction-selector-mips-unittest.cc b/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
|
| similarity index 79%
|
| copy from test/unittests/compiler/mips/instruction-selector-mips-unittest.cc
|
| copy to test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
|
| index 0b3a0f5a41508063ae4ed6d27d22ab285096d102..a39ae754f08d71bc00e859bd1e88ca618574927e 100644
|
| --- a/test/unittests/compiler/mips/instruction-selector-mips-unittest.cc
|
| +++ b/test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc
|
| @@ -9,7 +9,6 @@ namespace internal {
|
| namespace compiler {
|
|
|
| namespace {
|
| -
|
| template <typename T>
|
| struct MachInst {
|
| T constructor;
|
| @@ -26,6 +25,7 @@ std::ostream& operator<<(std::ostream& os, const MachInst<T>& mi) {
|
| typedef MachInst<Node* (RawMachineAssembler::*)(Node*)> MachInst1;
|
| typedef MachInst<Node* (RawMachineAssembler::*)(Node*, Node*)> MachInst2;
|
|
|
| +
|
| // To avoid duplicated code IntCmp helper structure
|
| // is created. It contains MachInst2 with two nodes and expected_size
|
| // because different cmp instructions have different size.
|
| @@ -40,20 +40,20 @@ struct FPCmp {
|
| };
|
|
|
| const FPCmp kFPCmpInstructions[] = {
|
| - {{&RawMachineAssembler::Float64Equal, "Float64Equal", kMipsCmpD,
|
| + {{&RawMachineAssembler::Float64Equal, "Float64Equal", kMips64CmpD,
|
| kMachFloat64},
|
| kUnorderedEqual},
|
| - {{&RawMachineAssembler::Float64LessThan, "Float64LessThan", kMipsCmpD,
|
| + {{&RawMachineAssembler::Float64LessThan, "Float64LessThan", kMips64CmpD,
|
| kMachFloat64},
|
| kUnorderedLessThan},
|
| {{&RawMachineAssembler::Float64LessThanOrEqual, "Float64LessThanOrEqual",
|
| - kMipsCmpD, kMachFloat64},
|
| + kMips64CmpD, kMachFloat64},
|
| kUnorderedLessThanOrEqual},
|
| - {{&RawMachineAssembler::Float64GreaterThan, "Float64GreaterThan", kMipsCmpD,
|
| - kMachFloat64},
|
| + {{&RawMachineAssembler::Float64GreaterThan, "Float64GreaterThan",
|
| + kMips64CmpD, kMachFloat64},
|
| kUnorderedLessThan},
|
| {{&RawMachineAssembler::Float64GreaterThanOrEqual,
|
| - "Float64GreaterThanOrEqual", kMipsCmpD, kMachFloat64},
|
| + "Float64GreaterThanOrEqual", kMips64CmpD, kMachFloat64},
|
| kUnorderedLessThanOrEqual}};
|
|
|
| struct Conversion {
|
| @@ -69,12 +69,12 @@ struct Conversion {
|
|
|
|
|
| const MachInst2 kLogicalInstructions[] = {
|
| - {&RawMachineAssembler::WordAnd, "WordAnd", kMipsAnd, kMachInt16},
|
| - {&RawMachineAssembler::WordOr, "WordOr", kMipsOr, kMachInt16},
|
| - {&RawMachineAssembler::WordXor, "WordXor", kMipsXor, kMachInt16},
|
| - {&RawMachineAssembler::Word32And, "Word32And", kMipsAnd, kMachInt32},
|
| - {&RawMachineAssembler::Word32Or, "Word32Or", kMipsOr, kMachInt32},
|
| - {&RawMachineAssembler::Word32Xor, "Word32Xor", kMipsXor, kMachInt32}};
|
| + {&RawMachineAssembler::Word32And, "Word32And", kMips64And, kMachInt32},
|
| + {&RawMachineAssembler::Word64And, "Word64And", kMips64And, kMachInt64},
|
| + {&RawMachineAssembler::Word32Or, "Word32Or", kMips64Or, kMachInt32},
|
| + {&RawMachineAssembler::Word64Or, "Word64Or", kMips64Or, kMachInt64},
|
| + {&RawMachineAssembler::Word32Xor, "Word32Xor", kMips64Xor, kMachInt32},
|
| + {&RawMachineAssembler::Word64Xor, "Word64Xor", kMips64Xor, kMachInt64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -83,14 +83,14 @@ const MachInst2 kLogicalInstructions[] = {
|
|
|
|
|
| const MachInst2 kShiftInstructions[] = {
|
| - {&RawMachineAssembler::WordShl, "WordShl", kMipsShl, kMachInt16},
|
| - {&RawMachineAssembler::WordShr, "WordShr", kMipsShr, kMachInt16},
|
| - {&RawMachineAssembler::WordSar, "WordSar", kMipsSar, kMachInt16},
|
| - {&RawMachineAssembler::WordRor, "WordRor", kMipsRor, kMachInt16},
|
| - {&RawMachineAssembler::Word32Shl, "Word32Shl", kMipsShl, kMachInt32},
|
| - {&RawMachineAssembler::Word32Shr, "Word32Shr", kMipsShr, kMachInt32},
|
| - {&RawMachineAssembler::Word32Sar, "Word32Sar", kMipsSar, kMachInt32},
|
| - {&RawMachineAssembler::Word32Ror, "Word32Ror", kMipsRor, kMachInt32}};
|
| + {&RawMachineAssembler::Word32Shl, "Word32Shl", kMips64Shl, kMachInt32},
|
| + {&RawMachineAssembler::Word64Shl, "Word64Shl", kMips64Dshl, kMachInt64},
|
| + {&RawMachineAssembler::Word32Shr, "Word32Shr", kMips64Shr, kMachInt32},
|
| + {&RawMachineAssembler::Word64Shr, "Word64Shr", kMips64Dshr, kMachInt64},
|
| + {&RawMachineAssembler::Word32Sar, "Word32Sar", kMips64Sar, kMachInt32},
|
| + {&RawMachineAssembler::Word64Sar, "Word64Sar", kMips64Dsar, kMachInt64},
|
| + {&RawMachineAssembler::Word32Ror, "Word32Ror", kMips64Ror, kMachInt32},
|
| + {&RawMachineAssembler::Word64Ror, "Word64Ror", kMips64Dror, kMachInt64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -99,11 +99,15 @@ const MachInst2 kShiftInstructions[] = {
|
|
|
|
|
| const MachInst2 kMulDivInstructions[] = {
|
| - {&RawMachineAssembler::Int32Mul, "Int32Mul", kMipsMul, kMachInt32},
|
| - {&RawMachineAssembler::Int32Div, "Int32Div", kMipsDiv, kMachInt32},
|
| - {&RawMachineAssembler::Uint32Div, "Uint32Div", kMipsDivU, kMachUint32},
|
| - {&RawMachineAssembler::Float64Mul, "Float64Mul", kMipsMulD, kMachFloat64},
|
| - {&RawMachineAssembler::Float64Div, "Float64Div", kMipsDivD, kMachFloat64}};
|
| + {&RawMachineAssembler::Int32Mul, "Int32Mul", kMips64Mul, kMachInt32},
|
| + {&RawMachineAssembler::Int32Div, "Int32Div", kMips64Div, kMachInt32},
|
| + {&RawMachineAssembler::Uint32Div, "Uint32Div", kMips64DivU, kMachUint32},
|
| + {&RawMachineAssembler::Int64Mul, "Int64Mul", kMips64Dmul, kMachInt64},
|
| + {&RawMachineAssembler::Int64Div, "Int64Div", kMips64Ddiv, kMachInt64},
|
| + {&RawMachineAssembler::Uint64Div, "Uint64Div", kMips64DdivU, kMachUint64},
|
| + {&RawMachineAssembler::Float64Mul, "Float64Mul", kMips64MulD, kMachFloat64},
|
| + {&RawMachineAssembler::Float64Div, "Float64Div", kMips64DivD,
|
| + kMachFloat64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -112,9 +116,10 @@ const MachInst2 kMulDivInstructions[] = {
|
|
|
|
|
| const MachInst2 kModInstructions[] = {
|
| - {&RawMachineAssembler::Int32Mod, "Int32Mod", kMipsMod, kMachInt32},
|
| - {&RawMachineAssembler::Uint32Mod, "Int32UMod", kMipsModU, kMachInt32},
|
| - {&RawMachineAssembler::Float64Mod, "Float64Mod", kMipsModD, kMachFloat64}};
|
| + {&RawMachineAssembler::Int32Mod, "Int32Mod", kMips64Mod, kMachInt32},
|
| + {&RawMachineAssembler::Uint32Mod, "Uint32Mod", kMips64ModU, kMachInt32},
|
| + {&RawMachineAssembler::Float64Mod, "Float64Mod", kMips64ModD,
|
| + kMachFloat64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -123,8 +128,9 @@ const MachInst2 kModInstructions[] = {
|
|
|
|
|
| const MachInst2 kFPArithInstructions[] = {
|
| - {&RawMachineAssembler::Float64Add, "Float64Add", kMipsAddD, kMachFloat64},
|
| - {&RawMachineAssembler::Float64Sub, "Float64Sub", kMipsSubD, kMachFloat64}};
|
| + {&RawMachineAssembler::Float64Add, "Float64Add", kMips64AddD, kMachFloat64},
|
| + {&RawMachineAssembler::Float64Sub, "Float64Sub", kMips64SubD,
|
| + kMachFloat64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -133,12 +139,10 @@ const MachInst2 kFPArithInstructions[] = {
|
|
|
|
|
| const MachInst2 kAddSubInstructions[] = {
|
| - {&RawMachineAssembler::Int32Add, "Int32Add", kMipsAdd, kMachInt32},
|
| - {&RawMachineAssembler::Int32Sub, "Int32Sub", kMipsSub, kMachInt32},
|
| - {&RawMachineAssembler::Int32AddWithOverflow, "Int32AddWithOverflow",
|
| - kMipsAddOvf, kMachInt32},
|
| - {&RawMachineAssembler::Int32SubWithOverflow, "Int32SubWithOverflow",
|
| - kMipsSubOvf, kMachInt32}};
|
| + {&RawMachineAssembler::Int32Add, "Int32Add", kMips64Add, kMachInt32},
|
| + {&RawMachineAssembler::Int64Add, "Int64Add", kMips64Dadd, kMachInt64},
|
| + {&RawMachineAssembler::Int32Sub, "Int32Sub", kMips64Sub, kMachInt32},
|
| + {&RawMachineAssembler::Int64Sub, "Int64Sub", kMips64Dsub, kMachInt64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -147,10 +151,8 @@ const MachInst2 kAddSubInstructions[] = {
|
|
|
|
|
| const MachInst1 kAddSubOneInstructions[] = {
|
| - {&RawMachineAssembler::Int32Neg, "Int32Neg", kMipsSub, kMachInt32},
|
| - // TODO(dusmil): check this ...
|
| - // {&RawMachineAssembler::WordEqual , "WordEqual" , kMipsTst, kMachInt32}
|
| -};
|
| + {&RawMachineAssembler::Int32Neg, "Int32Neg", kMips64Sub, kMachInt32},
|
| + {&RawMachineAssembler::Int64Neg, "Int64Neg", kMips64Dsub, kMachInt64}};
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| @@ -159,31 +161,34 @@ const MachInst1 kAddSubOneInstructions[] = {
|
|
|
|
|
| const IntCmp kCmpInstructions[] = {
|
| - {{&RawMachineAssembler::WordEqual, "WordEqual", kMipsCmp, kMachInt16}, 1U},
|
| - {{&RawMachineAssembler::WordNotEqual, "WordNotEqual", kMipsCmp, kMachInt16},
|
| + {{&RawMachineAssembler::WordEqual, "WordEqual", kMips64Cmp, kMachInt64},
|
| + 1U},
|
| + {{&RawMachineAssembler::WordNotEqual, "WordNotEqual", kMips64Cmp,
|
| + kMachInt64},
|
| 1U},
|
| - {{&RawMachineAssembler::Word32Equal, "Word32Equal", kMipsCmp, kMachInt32},
|
| + {{&RawMachineAssembler::Word32Equal, "Word32Equal", kMips64Cmp32,
|
| + kMachInt32},
|
| 1U},
|
| - {{&RawMachineAssembler::Word32NotEqual, "Word32NotEqual", kMipsCmp,
|
| + {{&RawMachineAssembler::Word32NotEqual, "Word32NotEqual", kMips64Cmp32,
|
| kMachInt32},
|
| 1U},
|
| - {{&RawMachineAssembler::Int32LessThan, "Int32LessThan", kMipsCmp,
|
| + {{&RawMachineAssembler::Int32LessThan, "Int32LessThan", kMips64Cmp32,
|
| kMachInt32},
|
| 1U},
|
| {{&RawMachineAssembler::Int32LessThanOrEqual, "Int32LessThanOrEqual",
|
| - kMipsCmp, kMachInt32},
|
| + kMips64Cmp32, kMachInt32},
|
| 1U},
|
| - {{&RawMachineAssembler::Int32GreaterThan, "Int32GreaterThan", kMipsCmp,
|
| + {{&RawMachineAssembler::Int32GreaterThan, "Int32GreaterThan", kMips64Cmp32,
|
| kMachInt32},
|
| 1U},
|
| {{&RawMachineAssembler::Int32GreaterThanOrEqual, "Int32GreaterThanOrEqual",
|
| - kMipsCmp, kMachInt32},
|
| + kMips64Cmp32, kMachInt32},
|
| 1U},
|
| - {{&RawMachineAssembler::Uint32LessThan, "Uint32LessThan", kMipsCmp,
|
| + {{&RawMachineAssembler::Uint32LessThan, "Uint32LessThan", kMips64Cmp32,
|
| kMachUint32},
|
| 1U},
|
| {{&RawMachineAssembler::Uint32LessThanOrEqual, "Uint32LessThanOrEqual",
|
| - kMipsCmp, kMachUint32},
|
| + kMips64Cmp32, kMachUint32},
|
| 1U}};
|
|
|
|
|
| @@ -198,24 +203,30 @@ const Conversion kConversionInstructions[] = {
|
| // The precise rounding mode and handling of out of range inputs are *not*
|
| // defined for these operators, since they are intended only for use with
|
| // integers.
|
| - // mips instruction: cvt_d_w
|
| + // mips instructions:
|
| + // mtc1, cvt.d.w
|
| {{&RawMachineAssembler::ChangeInt32ToFloat64, "ChangeInt32ToFloat64",
|
| - kMipsCvtDW, kMachFloat64},
|
| + kMips64CvtDW, kMachFloat64},
|
| kMachInt32},
|
|
|
| - // mips instruction: cvt_d_uw
|
| + // mips instructions:
|
| + // cvt.d.uw
|
| {{&RawMachineAssembler::ChangeUint32ToFloat64, "ChangeUint32ToFloat64",
|
| - kMipsCvtDUw, kMachFloat64},
|
| + kMips64CvtDUw, kMachFloat64},
|
| kMachInt32},
|
|
|
| - // mips instruction: trunc_w_d
|
| + // mips instructions:
|
| + // mfc1, trunc double to word, for more details look at mips macro
|
| + // asm and mips asm file
|
| {{&RawMachineAssembler::ChangeFloat64ToInt32, "ChangeFloat64ToInt32",
|
| - kMipsTruncWD, kMachFloat64},
|
| + kMips64TruncWD, kMachFloat64},
|
| kMachInt32},
|
|
|
| - // mips instruction: trunc_uw_d
|
| + // mips instructions:
|
| + // trunc double to unsigned word, for more details look at mips macro
|
| + // asm and mips asm file
|
| {{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32",
|
| - kMipsTruncUwD, kMachFloat64},
|
| + kMips64TruncUwD, kMachFloat64},
|
| kMachInt32}};
|
|
|
| } // namespace
|
| @@ -223,7 +234,6 @@ const Conversion kConversionInstructions[] = {
|
|
|
| typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorFPCmpTest, Parameter) {
|
| const FPCmp cmp = GetParam();
|
| StreamBuilder m(this, kMachInt32, cmp.mi.machine_type, cmp.mi.machine_type);
|
| @@ -240,12 +250,9 @@ TEST_P(InstructionSelectorFPCmpTest, Parameter) {
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPCmpTest,
|
| ::testing::ValuesIn(kFPCmpInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| -// Arithmetic compare instructions integers.
|
| +// Arithmetic compare instructions integers
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<IntCmp> InstructionSelectorCmpTest;
|
|
|
|
|
| @@ -261,20 +268,15 @@ TEST_P(InstructionSelectorCmpTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorCmpTest,
|
| ::testing::ValuesIn(kCmpInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| // Shift instructions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2>
|
| InstructionSelectorShiftTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorShiftTest, Immediate) {
|
| const MachInst2 dpi = GetParam();
|
| const MachineType type = dpi.machine_type;
|
| @@ -291,16 +293,12 @@ TEST_P(InstructionSelectorShiftTest, Immediate) {
|
| }
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest,
|
| ::testing::ValuesIn(kShiftInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| // Logical instructions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2>
|
| InstructionSelectorLogicalTest;
|
|
|
| @@ -317,20 +315,15 @@ TEST_P(InstructionSelectorLogicalTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest,
|
| ::testing::ValuesIn(kLogicalInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| // MUL/DIV instructions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2>
|
| InstructionSelectorMulDivTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorMulDivTest, Parameter) {
|
| const MachInst2 dpi = GetParam();
|
| const MachineType type = dpi.machine_type;
|
| @@ -343,19 +336,14 @@ TEST_P(InstructionSelectorMulDivTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMulDivTest,
|
| ::testing::ValuesIn(kMulDivInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| // MOD instructions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2> InstructionSelectorModTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorModTest, Parameter) {
|
| const MachInst2 dpi = GetParam();
|
| const MachineType type = dpi.machine_type;
|
| @@ -368,20 +356,15 @@ TEST_P(InstructionSelectorModTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorModTest,
|
| ::testing::ValuesIn(kModInstructions));
|
|
|
| -
|
| // ----------------------------------------------------------------------------
|
| // Floating point instructions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2>
|
| InstructionSelectorFPArithTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorFPArithTest, Parameter) {
|
| const MachInst2 fpa = GetParam();
|
| StreamBuilder m(this, fpa.machine_type, fpa.machine_type, fpa.machine_type);
|
| @@ -393,20 +376,14 @@ TEST_P(InstructionSelectorFPArithTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPArithTest,
|
| ::testing::ValuesIn(kFPArithInstructions));
|
| -
|
| -
|
| // ----------------------------------------------------------------------------
|
| -// Integer arithmetic.
|
| +// Integer arithmetic
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<MachInst2>
|
| InstructionSelectorIntArithTwoTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorIntArithTwoTest, Parameter) {
|
| const MachInst2 intpa = GetParam();
|
| StreamBuilder m(this, intpa.machine_type, intpa.machine_type,
|
| @@ -419,7 +396,6 @@ TEST_P(InstructionSelectorIntArithTwoTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorIntArithTwoTest,
|
| ::testing::ValuesIn(kAddSubInstructions));
|
| @@ -433,7 +409,6 @@ INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| typedef InstructionSelectorTestWithParam<MachInst1>
|
| InstructionSelectorIntArithOneTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorIntArithOneTest, Parameter) {
|
| const MachInst1 intpa = GetParam();
|
| StreamBuilder m(this, intpa.machine_type, intpa.machine_type,
|
| @@ -446,21 +421,15 @@ TEST_P(InstructionSelectorIntArithOneTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorIntArithOneTest,
|
| ::testing::ValuesIn(kAddSubOneInstructions));
|
| -
|
| -
|
| // ----------------------------------------------------------------------------
|
| // Conversions.
|
| // ----------------------------------------------------------------------------
|
| -
|
| -
|
| typedef InstructionSelectorTestWithParam<Conversion>
|
| InstructionSelectorConversionTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorConversionTest, Parameter) {
|
| const Conversion conv = GetParam();
|
| StreamBuilder m(this, conv.mi.machine_type, conv.src_machine_type);
|
| @@ -472,7 +441,6 @@ TEST_P(InstructionSelectorConversionTest, Parameter) {
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorConversionTest,
|
| ::testing::ValuesIn(kConversionInstructions));
|
| @@ -482,6 +450,7 @@ INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| // Loads and stores.
|
| // ----------------------------------------------------------------------------
|
|
|
| +
|
| namespace {
|
|
|
| struct MemoryAccess {
|
| @@ -490,15 +459,15 @@ struct MemoryAccess {
|
| ArchOpcode store_opcode;
|
| };
|
|
|
| -
|
| static const MemoryAccess kMemoryAccesses[] = {
|
| - {kMachInt8, kMipsLb, kMipsSb},
|
| - {kMachUint8, kMipsLbu, kMipsSb},
|
| - {kMachInt16, kMipsLh, kMipsSh},
|
| - {kMachUint16, kMipsLhu, kMipsSh},
|
| - {kMachInt32, kMipsLw, kMipsSw},
|
| - {kRepFloat32, kMipsLwc1, kMipsSwc1},
|
| - {kRepFloat64, kMipsLdc1, kMipsSdc1}};
|
| + {kMachInt8, kMips64Lb, kMips64Sb},
|
| + {kMachUint8, kMips64Lbu, kMips64Sb},
|
| + {kMachInt16, kMips64Lh, kMips64Sh},
|
| + {kMachUint16, kMips64Lhu, kMips64Sh},
|
| + {kMachInt32, kMips64Lw, kMips64Sw},
|
| + {kRepFloat32, kMips64Lwc1, kMips64Swc1},
|
| + {kRepFloat64, kMips64Ldc1, kMips64Sdc1},
|
| + {kMachInt64, kMips64Ld, kMips64Sd}};
|
|
|
|
|
| struct MemoryAccessImm {
|
| @@ -532,97 +501,109 @@ std::ostream& operator<<(std::ostream& os, const MemoryAccessImm1& acc) {
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| -// Loads and stores immediate values.
|
| +// Loads and stores immediate values
|
| // ----------------------------------------------------------------------------
|
|
|
|
|
| const MemoryAccessImm kMemoryAccessesImm[] = {
|
| {kMachInt8,
|
| - kMipsLb,
|
| - kMipsSb,
|
| + kMips64Lb,
|
| + kMips64Sb,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachUint8,
|
| - kMipsLbu,
|
| - kMipsSb,
|
| + kMips64Lbu,
|
| + kMips64Sb,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachInt16,
|
| - kMipsLh,
|
| - kMipsSh,
|
| + kMips64Lh,
|
| + kMips64Sh,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachUint16,
|
| - kMipsLhu,
|
| - kMipsSh,
|
| + kMips64Lhu,
|
| + kMips64Sh,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachInt32,
|
| - kMipsLw,
|
| - kMipsSw,
|
| + kMips64Lw,
|
| + kMips64Sw,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachFloat32,
|
| - kMipsLwc1,
|
| - kMipsSwc1,
|
| + kMips64Lwc1,
|
| + kMips64Swc1,
|
| &InstructionSelectorTest::Stream::IsDouble,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| {kMachFloat64,
|
| - kMipsLdc1,
|
| - kMipsSdc1,
|
| + kMips64Ldc1,
|
| + kMips64Sdc1,
|
| &InstructionSelectorTest::Stream::IsDouble,
|
| {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| + 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
|
| + {kMachInt64,
|
| + kMips64Ld,
|
| + kMips64Sd,
|
| + &InstructionSelectorTest::Stream::IsInteger,
|
| + {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
|
| + -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
|
| 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}};
|
|
|
|
|
| const MemoryAccessImm1 kMemoryAccessImmMoreThan16bit[] = {
|
| {kMachInt8,
|
| - kMipsLb,
|
| - kMipsSb,
|
| + kMips64Lb,
|
| + kMips64Sb,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachInt8,
|
| - kMipsLbu,
|
| - kMipsSb,
|
| + kMips64Lbu,
|
| + kMips64Sb,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachInt16,
|
| - kMipsLh,
|
| - kMipsSh,
|
| + kMips64Lh,
|
| + kMips64Sh,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachInt16,
|
| - kMipsLhu,
|
| - kMipsSh,
|
| + kMips64Lhu,
|
| + kMips64Sh,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachInt32,
|
| - kMipsLw,
|
| - kMipsSw,
|
| + kMips64Lw,
|
| + kMips64Sw,
|
| &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachFloat32,
|
| - kMipsLwc1,
|
| - kMipsSwc1,
|
| + kMips64Lwc1,
|
| + kMips64Swc1,
|
| &InstructionSelectorTest::Stream::IsDouble,
|
| {-65000, -55000, 32777, 55000, 65000}},
|
| {kMachFloat64,
|
| - kMipsLdc1,
|
| - kMipsSdc1,
|
| + kMips64Ldc1,
|
| + kMips64Sdc1,
|
| &InstructionSelectorTest::Stream::IsDouble,
|
| + {-65000, -55000, 32777, 55000, 65000}},
|
| + {kMachInt64,
|
| + kMips64Ld,
|
| + kMips64Sd,
|
| + &InstructionSelectorTest::Stream::IsInteger,
|
| {-65000, -55000, 32777, 55000, 65000}}};
|
|
|
| } // namespace
|
| @@ -631,7 +612,6 @@ const MemoryAccessImm1 kMemoryAccessImmMoreThan16bit[] = {
|
| typedef InstructionSelectorTestWithParam<MemoryAccess>
|
| InstructionSelectorMemoryAccessTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
|
| const MemoryAccess memacc = GetParam();
|
| StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
|
| @@ -654,7 +634,6 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
|
| EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorMemoryAccessTest,
|
| ::testing::ValuesIn(kMemoryAccesses));
|
| @@ -668,7 +647,6 @@ INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| typedef InstructionSelectorTestWithParam<MemoryAccessImm>
|
| InstructionSelectorMemoryAccessImmTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorMemoryAccessImmTest, LoadWithImmediateIndex) {
|
| const MemoryAccessImm memacc = GetParam();
|
| TRACED_FOREACH(int32_t, index, memacc.immediates) {
|
| @@ -710,7 +688,6 @@ TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) {
|
| }
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorMemoryAccessImmTest,
|
| ::testing::ValuesIn(kMemoryAccessesImm));
|
| @@ -724,7 +701,6 @@ INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| typedef InstructionSelectorTestWithParam<MemoryAccessImm1>
|
| InstructionSelectorMemoryAccessImmMoreThan16bitTest;
|
|
|
| -
|
| TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
|
| LoadWithImmediateIndex) {
|
| const MemoryAccessImm1 memacc = GetParam();
|
| @@ -733,16 +709,15 @@ TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
|
| m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
|
| Stream s = m.Build();
|
| ASSERT_EQ(2U, s.size());
|
| - // kMipsAdd is expected opcode.
|
| - // size more than 16 bits wide.
|
| - EXPECT_EQ(kMipsAdd, s[0]->arch_opcode());
|
| + // kMips64Dadd is expected opcode
|
| + // size more than 16 bits wide
|
| + EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode());
|
| EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| EXPECT_EQ(2U, s[0]->InputCount());
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
| }
|
|
|
| -
|
| TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
|
| StoreWithImmediateIndex) {
|
| const MemoryAccessImm1 memacc = GetParam();
|
| @@ -753,23 +728,22 @@ TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
|
| m.Return(m.Int32Constant(0));
|
| Stream s = m.Build();
|
| ASSERT_EQ(2U, s.size());
|
| - // kMipsAdd is expected opcode
|
| + // kMips64Add is expected opcode
|
| // size more than 16 bits wide
|
| - EXPECT_EQ(kMipsAdd, s[0]->arch_opcode());
|
| + EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode());
|
| EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| EXPECT_EQ(2U, s[0]->InputCount());
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| }
|
| }
|
|
|
| -
|
| INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
|
| InstructionSelectorMemoryAccessImmMoreThan16bitTest,
|
| ::testing::ValuesIn(kMemoryAccessImmMoreThan16bit));
|
|
|
|
|
| // ----------------------------------------------------------------------------
|
| -// kMipsTst testing.
|
| +// kMips64Cmp with zero testing.
|
| // ----------------------------------------------------------------------------
|
|
|
|
|
| @@ -779,7 +753,7 @@ TEST_F(InstructionSelectorTest, Word32EqualWithZero) {
|
| m.Return(m.Word32Equal(m.Parameter(0), m.Int32Constant(0)));
|
| Stream s = m.Build();
|
| ASSERT_EQ(1U, s.size());
|
| - EXPECT_EQ(kMipsCmp, s[0]->arch_opcode());
|
| + EXPECT_EQ(kMips64Cmp32, s[0]->arch_opcode());
|
| EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| ASSERT_EQ(2U, s[0]->InputCount());
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
| @@ -791,7 +765,35 @@ TEST_F(InstructionSelectorTest, Word32EqualWithZero) {
|
| m.Return(m.Word32Equal(m.Int32Constant(0), m.Parameter(0)));
|
| Stream s = m.Build();
|
| ASSERT_EQ(1U, s.size());
|
| - EXPECT_EQ(kMipsCmp, s[0]->arch_opcode());
|
| + EXPECT_EQ(kMips64Cmp32, s[0]->arch_opcode());
|
| + EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| + ASSERT_EQ(2U, s[0]->InputCount());
|
| + EXPECT_EQ(1U, s[0]->OutputCount());
|
| + EXPECT_EQ(kFlags_set, s[0]->flags_mode());
|
| + EXPECT_EQ(kEqual, s[0]->flags_condition());
|
| + }
|
| +}
|
| +
|
| +
|
| +TEST_F(InstructionSelectorTest, Word64EqualWithZero) {
|
| + {
|
| + StreamBuilder m(this, kMachInt64, kMachInt64);
|
| + m.Return(m.Word64Equal(m.Parameter(0), m.Int64Constant(0)));
|
| + Stream s = m.Build();
|
| + ASSERT_EQ(1U, s.size());
|
| + EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
|
| + EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| + ASSERT_EQ(2U, s[0]->InputCount());
|
| + EXPECT_EQ(1U, s[0]->OutputCount());
|
| + EXPECT_EQ(kFlags_set, s[0]->flags_mode());
|
| + EXPECT_EQ(kEqual, s[0]->flags_condition());
|
| + }
|
| + {
|
| + StreamBuilder m(this, kMachInt64, kMachInt64);
|
| + m.Return(m.Word64Equal(m.Int32Constant(0), m.Parameter(0)));
|
| + Stream s = m.Build();
|
| + ASSERT_EQ(1U, s.size());
|
| + EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
|
| EXPECT_EQ(kMode_None, s[0]->addressing_mode());
|
| ASSERT_EQ(2U, s[0]->InputCount());
|
| EXPECT_EQ(1U, s[0]->OutputCount());
|
|
|