Fix compilation on ARM and x64.

src/arm/assembler-arm-inl.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 61 matching lines @@
 int RelocInfo::target_address_size() {
   return Assembler::kExternalTargetSize;
 }
 
 
 void RelocInfo::set_target_address(Address target, Code* code) {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
   Assembler::set_target_address_at(pc_, target);
   if (code != NULL && IsCodeTarget(rmode_)) {
     Object* target_code = Code::GetCodeFromTargetAddress(target);
+    // TODO(gc) We do not compact code pages.
     code->GetHeap()->incremental_marking()->RecordWrite(
-        code, HeapObject::cast(target_code));
+        code, NULL, HeapObject::cast(target_code));
   }
 }
 
 
 Object* RelocInfo::target_object() {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
   return Memory::Object_at(Assembler::target_address_address_at(pc_));
 }
 
 
 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
   return Memory::Object_Handle_at(Assembler::target_address_address_at(pc_));
 }
 
 
 Object** RelocInfo::target_object_address() {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
   return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_));
 }
 
 
 void RelocInfo::set_target_object(Object* target, Code* code) {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
   Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
   if (code != NULL && target->IsHeapObject()) {
+    // It is safe to record this slot as a simple in object slot
+    // because it resides outside of code stream and updating it
+    // does not require code cache flushing.
     code->GetHeap()->incremental_marking()->RecordWrite(
-        code, HeapObject::cast(target));
+        code, target_object_address(), HeapObject::cast(target));
   }
 }
 
 
 Address* RelocInfo::target_reference_address() {
   ASSERT(rmode_ == EXTERNAL_REFERENCE);
   return reinterpret_cast<Address*>(Assembler::target_address_address_at(pc_));
 }
 
 
@@ skipping 12 matching lines @@
       address - JSGlobalPropertyCell::kValueOffset);
   return reinterpret_cast<JSGlobalPropertyCell*>(object);
 }
 
 
 void RelocInfo::set_target_cell(JSGlobalPropertyCell* cell, Code* code) {
   ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
   Address address = cell->address() + JSGlobalPropertyCell::kValueOffset;
   Memory::Address_at(pc_) = address;
   if (code != NULL) {
-    code->GetHeap()->incremental_marking()->RecordWrite(code, cell);
+    code->GetHeap()->incremental_marking()->RecordWrite(
+        code, &Memory::Object_at(pc_), cell);
   }
 }
 
 
 Address RelocInfo::call_address() {
   // The 2 instructions offset assumes patched debug break slot or return
   // sequence.
   ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
          (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
   return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize);
@@ skipping 201 matching lines @@
   //   CPU::FlushICache(pc, sizeof(target));
   // However, on ARM, no instruction was actually patched by the assignment
   // above; the target address is not part of an instruction, it is patched in
   // the constant pool and is read via a data access; the instruction accessing
   // this address in the constant pool remains unchanged.
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_INL_H_