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Side by Side Diff: runtime/vm/assembler_arm.h

Issue 730343005: Write-barrier verification on ARM. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_ARM_H_ 5 #ifndef VM_ASSEMBLER_ARM_H_
6 #define VM_ASSEMBLER_ARM_H_ 6 #define VM_ASSEMBLER_ARM_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_arm.h directly; use assembler.h instead. 9 #error Do not include assembler_arm.h directly; use assembler.h instead.
10 #endif 10 #endif
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190 class Address : public ValueObject { 190 class Address : public ValueObject {
191 public: 191 public:
192 enum OffsetKind { 192 enum OffsetKind {
193 Immediate, 193 Immediate,
194 IndexRegister, 194 IndexRegister,
195 ScaledIndexRegister, 195 ScaledIndexRegister,
196 }; 196 };
197 197
198 // Memory operand addressing mode 198 // Memory operand addressing mode
199 enum Mode { 199 enum Mode {
200 kModeMask = (8|4|1) << 21,
200 // bit encoding P U W 201 // bit encoding P U W
201 Offset = (8|4|0) << 21, // offset (w/o writeback to base) 202 Offset = (8|4|0) << 21, // offset (w/o writeback to base)
202 PreIndex = (8|4|1) << 21, // pre-indexed addressing with writeback 203 PreIndex = (8|4|1) << 21, // pre-indexed addressing with writeback
203 PostIndex = (0|4|0) << 21, // post-indexed addressing with writeback 204 PostIndex = (0|4|0) << 21, // post-indexed addressing with writeback
204 NegOffset = (8|0|0) << 21, // negative offset (w/o writeback to base) 205 NegOffset = (8|0|0) << 21, // negative offset (w/o writeback to base)
205 NegPreIndex = (8|0|1) << 21, // negative pre-indexed with writeback 206 NegPreIndex = (8|0|1) << 21, // negative pre-indexed with writeback
206 NegPostIndex = (0|0|0) << 21 // negative post-indexed with writeback 207 NegPostIndex = (0|0|0) << 21 // negative post-indexed with writeback
207 }; 208 };
208 209
209 Address(const Address& other) 210 Address(const Address& other)
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256 int32_t offset, 257 int32_t offset,
257 int32_t* offset_mask); 258 int32_t* offset_mask);
258 static bool CanHoldStoreOffset(OperandSize size, 259 static bool CanHoldStoreOffset(OperandSize size,
259 int32_t offset, 260 int32_t offset,
260 int32_t* offset_mask); 261 int32_t* offset_mask);
261 static bool CanHoldImmediateOffset(bool is_load, 262 static bool CanHoldImmediateOffset(bool is_load,
262 intptr_t cid, 263 intptr_t cid,
263 int64_t offset); 264 int64_t offset);
264 265
265 private: 266 private:
267 Register rn() const {
268 return Instr::At(reinterpret_cast<uword>(&encoding_))->RnField();
269 }
270
271 Register rm() const {
272 return ((kind() == IndexRegister) || (kind() == ScaledIndexRegister)) ?
273 Instr::At(reinterpret_cast<uword>(&encoding_))->RmField() :
274 kNoRegister;
275 }
276
277 Mode mode() const { return static_cast<Mode>(encoding() & kModeMask); }
278
266 uint32_t encoding() const { return encoding_; } 279 uint32_t encoding() const { return encoding_; }
267 280
268 // Encoding for addressing mode 3. 281 // Encoding for addressing mode 3.
269 uint32_t encoding3() const; 282 uint32_t encoding3() const;
270 283
271 // Encoding for vfp load/store addressing. 284 // Encoding for vfp load/store addressing.
272 uint32_t vencoding() const; 285 uint32_t vencoding() const;
273 286
274 OffsetKind kind() const { return kind_; } 287 OffsetKind kind() const { return kind_; }
275 288
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671 // Store value_even, value_odd, value_even, ... into the words in the address 684 // Store value_even, value_odd, value_even, ... into the words in the address
672 // range [begin, end), assumed to be uninitialized fields in object (tagged). 685 // range [begin, end), assumed to be uninitialized fields in object (tagged).
673 // The stores must not need a generational store barrier (e.g., smi/null), 686 // The stores must not need a generational store barrier (e.g., smi/null),
674 // and (value_even, value_odd) must be a valid register pair. 687 // and (value_even, value_odd) must be a valid register pair.
675 // Destroys register 'begin'. 688 // Destroys register 'begin'.
676 void InitializeFieldsNoBarrier(Register object, 689 void InitializeFieldsNoBarrier(Register object,
677 Register begin, 690 Register begin,
678 Register end, 691 Register end,
679 Register value_even, 692 Register value_even,
680 Register value_odd); 693 Register value_odd);
681 // Like above, for the range [begin, begin+count*kWordSize), unrolled. 694 // Like above, for the range [base+begin_offset, base+end_offset), unrolled.
682 void InitializeFieldsNoBarrierUnrolled(Register object, 695 void InitializeFieldsNoBarrierUnrolled(Register object,
683 Register begin, 696 Register base,
684 intptr_t count, 697 intptr_t begin_offset,
698 intptr_t end_offset,
685 Register value_even, 699 Register value_even,
686 Register value_odd); 700 Register value_odd);
687 701
702 // Stores a Smi value into a heap object field that always contains a Smi.
703 void StoreIntoSmiField(const Address& dest, Register value);
704
688 void LoadClassId(Register result, Register object, Condition cond = AL); 705 void LoadClassId(Register result, Register object, Condition cond = AL);
689 void LoadClassById(Register result, Register class_id); 706 void LoadClassById(Register result, Register class_id);
690 void LoadClass(Register result, Register object, Register scratch); 707 void LoadClass(Register result, Register object, Register scratch);
691 void CompareClassId(Register object, intptr_t class_id, Register scratch); 708 void CompareClassId(Register object, intptr_t class_id, Register scratch);
692 void LoadTaggedClassIdMayBeSmi(Register result, Register object); 709 void LoadTaggedClassIdMayBeSmi(Register result, Register object);
693 710
694 void LoadWordFromPoolOffset(Register rd, int32_t offset, Condition cond = AL); 711 void LoadWordFromPoolOffset(Register rd, int32_t offset, Condition cond = AL);
695 void LoadFromOffset(OperandSize type, 712 void LoadFromOffset(OperandSize type,
696 Register reg, 713 Register reg,
697 Register base, 714 Register base,
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1034 int32_t EncodeTstOffset(int32_t offset, int32_t inst); 1051 int32_t EncodeTstOffset(int32_t offset, int32_t inst);
1035 int32_t DecodeTstOffset(int32_t inst); 1052 int32_t DecodeTstOffset(int32_t inst);
1036 1053
1037 void StoreIntoObjectFilter(Register object, Register value, Label* no_update); 1054 void StoreIntoObjectFilter(Register object, Register value, Label* no_update);
1038 1055
1039 // Shorter filtering sequence that assumes that value is not a smi. 1056 // Shorter filtering sequence that assumes that value is not a smi.
1040 void StoreIntoObjectFilterNoSmi(Register object, 1057 void StoreIntoObjectFilterNoSmi(Register object,
1041 Register value, 1058 Register value,
1042 Label* no_update); 1059 Label* no_update);
1043 1060
1061 // Helpers for write-barrier verification.
1062
1063 // Returns VerifiedMemory::offset() as an Operand.
1064 Operand GetVerifiedMemoryShadow();
1065 // Writes value to [base + offset] and also its shadow location, if enabled.
1066 void WriteShadowedField(Register base,
1067 intptr_t offset,
1068 Register value,
1069 Condition cond = AL);
1070 void WriteShadowedFieldPair(Register base,
1071 intptr_t offset,
1072 Register value_even,
1073 Register value_odd,
1074 Condition cond = AL);
1075 void VerifiedWrite(const Address& address, Register new_value);
1076
1044 DISALLOW_ALLOCATION(); 1077 DISALLOW_ALLOCATION();
1045 DISALLOW_COPY_AND_ASSIGN(Assembler); 1078 DISALLOW_COPY_AND_ASSIGN(Assembler);
1046 }; 1079 };
1047 1080
1048 } // namespace dart 1081 } // namespace dart
1049 1082
1050 #endif // VM_ASSEMBLER_ARM_H_ 1083 #endif // VM_ASSEMBLER_ARM_H_
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