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Issue 7247002: Estimate a (close) upper bound on the size of black-marked objects on each page. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/gc
Patch Set: Address review comments. Make compile on x64. Created 9 years, 6 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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48 // Tables 48 // Tables
49 //------------------------------------------------------------------ 49 //------------------------------------------------------------------
50 struct ByteMnemonic { 50 struct ByteMnemonic {
51 int b; // -1 terminates, otherwise must be in range (0..255) 51 int b; // -1 terminates, otherwise must be in range (0..255)
52 const char* mnem; 52 const char* mnem;
53 OperandOrder op_order_; 53 OperandOrder op_order_;
54 }; 54 };
55 55
56 56
57 static ByteMnemonic two_operands_instr[] = { 57 static ByteMnemonic two_operands_instr[] = {
58 {0x01, "add", OPER_REG_OP_ORDER},
58 {0x03, "add", REG_OPER_OP_ORDER}, 59 {0x03, "add", REG_OPER_OP_ORDER},
59 {0x09, "or", OPER_REG_OP_ORDER}, 60 {0x09, "or", OPER_REG_OP_ORDER},
60 {0x0B, "or", REG_OPER_OP_ORDER}, 61 {0x0B, "or", REG_OPER_OP_ORDER},
61 {0x1B, "sbb", REG_OPER_OP_ORDER}, 62 {0x1B, "sbb", REG_OPER_OP_ORDER},
62 {0x21, "and", OPER_REG_OP_ORDER}, 63 {0x21, "and", OPER_REG_OP_ORDER},
63 {0x23, "and", REG_OPER_OP_ORDER}, 64 {0x23, "and", REG_OPER_OP_ORDER},
64 {0x29, "sub", OPER_REG_OP_ORDER}, 65 {0x29, "sub", OPER_REG_OP_ORDER},
65 {0x2A, "subb", REG_OPER_OP_ORDER}, 66 {0x2A, "subb", REG_OPER_OP_ORDER},
66 {0x2B, "sub", REG_OPER_OP_ORDER}, 67 {0x2B, "sub", REG_OPER_OP_ORDER},
67 {0x31, "xor", OPER_REG_OP_ORDER}, 68 {0x31, "xor", OPER_REG_OP_ORDER},
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1635 fprintf(f, " "); 1636 fprintf(f, " ");
1636 } 1637 }
1637 fprintf(f, " %s\n", buffer.start()); 1638 fprintf(f, " %s\n", buffer.start());
1638 } 1639 }
1639 } 1640 }
1640 1641
1641 1642
1642 } // namespace disasm 1643 } // namespace disasm
1643 1644
1644 #endif // V8_TARGET_ARCH_IA32 1645 #endif // V8_TARGET_ARCH_IA32
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