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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 295 const DwVfpRegister d7 = { 7 }; | 295 const DwVfpRegister d7 = { 7 }; |
| 296 const DwVfpRegister d8 = { 8 }; | 296 const DwVfpRegister d8 = { 8 }; |
| 297 const DwVfpRegister d9 = { 9 }; | 297 const DwVfpRegister d9 = { 9 }; |
| 298 const DwVfpRegister d10 = { 10 }; | 298 const DwVfpRegister d10 = { 10 }; |
| 299 const DwVfpRegister d11 = { 11 }; | 299 const DwVfpRegister d11 = { 11 }; |
| 300 const DwVfpRegister d12 = { 12 }; | 300 const DwVfpRegister d12 = { 12 }; |
| 301 const DwVfpRegister d13 = { 13 }; | 301 const DwVfpRegister d13 = { 13 }; |
| 302 const DwVfpRegister d14 = { 14 }; | 302 const DwVfpRegister d14 = { 14 }; |
| 303 const DwVfpRegister d15 = { 15 }; | 303 const DwVfpRegister d15 = { 15 }; |
| 304 | 304 |
| 305 // Aliases for double registers. |
| 306 const DwVfpRegister kFirstCalleeSavedDoubleReg = d8; |
| 307 const DwVfpRegister kLastCalleeSavedDoubleReg = d15; |
| 308 |
| 305 | 309 |
| 306 // Coprocessor register | 310 // Coprocessor register |
| 307 struct CRegister { | 311 struct CRegister { |
| 308 bool is_valid() const { return 0 <= code_ && code_ < 16; } | 312 bool is_valid() const { return 0 <= code_ && code_ < 16; } |
| 309 bool is(CRegister creg) const { return code_ == creg.code_; } | 313 bool is(CRegister creg) const { return code_ == creg.code_; } |
| 310 int code() const { | 314 int code() const { |
| 311 ASSERT(is_valid()); | 315 ASSERT(is_valid()); |
| 312 return code_; | 316 return code_; |
| 313 } | 317 } |
| 314 int bit() const { | 318 int bit() const { |
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| 1363 public: | 1367 public: |
| 1364 explicit EnsureSpace(Assembler* assembler) { | 1368 explicit EnsureSpace(Assembler* assembler) { |
| 1365 assembler->CheckBuffer(); | 1369 assembler->CheckBuffer(); |
| 1366 } | 1370 } |
| 1367 }; | 1371 }; |
| 1368 | 1372 |
| 1369 | 1373 |
| 1370 } } // namespace v8::internal | 1374 } } // namespace v8::internal |
| 1371 | 1375 |
| 1372 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1376 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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