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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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4292 } | 4292 } |
4293 // Update register availability before moving to the previous | 4293 // Update register availability before moving to the previous |
4294 // instruction on the Assignments list. | 4294 // instruction on the Assignments list. |
4295 if (Dest->hasReg()) | 4295 if (Dest->hasReg()) |
4296 Available[Dest->getRegNum()] = true; | 4296 Available[Dest->getRegNum()] = true; |
4297 if (SrcVar && SrcVar->hasReg()) | 4297 if (SrcVar && SrcVar->hasReg()) |
4298 Available[SrcVar->getRegNum()] = false; | 4298 Available[SrcVar->getRegNum()] = false; |
4299 } | 4299 } |
4300 | 4300 |
4301 // Add the terminator branch instruction to the end. | 4301 // Add the terminator branch instruction to the end. |
4302 Context.setInsertPoint(Context.end()); | 4302 Context.setInsertPoint(Context.getEnd()); |
4303 _br(Succ); | 4303 _br(Succ); |
4304 } | 4304 } |
4305 | 4305 |
4306 // There is no support for loading or emitting vector constants, so the | 4306 // There is no support for loading or emitting vector constants, so the |
4307 // vector values returned from makeVectorOfZeros, makeVectorOfOnes, | 4307 // vector values returned from makeVectorOfZeros, makeVectorOfOnes, |
4308 // etc. are initialized with register operations. | 4308 // etc. are initialized with register operations. |
4309 // | 4309 // |
4310 // TODO(wala): Add limited support for vector constants so that | 4310 // TODO(wala): Add limited support for vector constants so that |
4311 // complex initialization in registers is unnecessary. | 4311 // complex initialization in registers is unnecessary. |
4312 | 4312 |
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4502 else | 4502 else |
4503 Reg->setRegNum(RegNum); | 4503 Reg->setRegNum(RegNum); |
4504 return Reg; | 4504 return Reg; |
4505 } | 4505 } |
4506 | 4506 |
4507 void TargetX8632::postLower() { | 4507 void TargetX8632::postLower() { |
4508 if (Ctx->getOptLevel() == Opt_m1) | 4508 if (Ctx->getOptLevel() == Opt_m1) |
4509 return; | 4509 return; |
4510 // Find two-address non-SSA instructions where Dest==Src0, and set | 4510 // Find two-address non-SSA instructions where Dest==Src0, and set |
4511 // the DestNonKillable flag to keep liveness analysis consistent. | 4511 // the DestNonKillable flag to keep liveness analysis consistent. |
4512 for (auto Inst = Context.begin(), E = Context.end(); Inst != E; ++Inst) { | 4512 for (auto Inst = Context.getCur(), E = Context.getNext(); Inst != E; ++Inst) { |
4513 if (Inst->isDeleted()) | 4513 if (Inst->isDeleted()) |
4514 continue; | 4514 continue; |
4515 if (Variable *Dest = Inst->getDest()) { | 4515 if (Variable *Dest = Inst->getDest()) { |
4516 // TODO(stichnot): We may need to consider all source | 4516 // TODO(stichnot): We may need to consider all source |
4517 // operands, not just the first one, if using 3-address | 4517 // operands, not just the first one, if using 3-address |
4518 // instructions. | 4518 // instructions. |
4519 if (Inst->getSrcSize() > 0 && Inst->getSrc(0) == Dest) | 4519 if (Inst->getSrcSize() > 0 && Inst->getSrc(0) == Dest) |
4520 Inst->setDestNonKillable(); | 4520 Inst->setDestNonKillable(); |
4521 } | 4521 } |
4522 } | 4522 } |
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4641 } else if (IsConstant || IsExternal) | 4641 } else if (IsConstant || IsExternal) |
4642 Str << "\t.zero\t" << Size << "\n"; | 4642 Str << "\t.zero\t" << Size << "\n"; |
4643 // Size is part of .comm. | 4643 // Size is part of .comm. |
4644 | 4644 |
4645 if (IsConstant || HasNonzeroInitializer || IsExternal) | 4645 if (IsConstant || HasNonzeroInitializer || IsExternal) |
4646 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 4646 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
4647 // Size is part of .comm. | 4647 // Size is part of .comm. |
4648 } | 4648 } |
4649 | 4649 |
4650 } // end of namespace Ice | 4650 } // end of namespace Ice |
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