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Unified Diff: src/compiler/arm64/code-generator-arm64.cc

Issue 715433004: [turbofan] Use cbz/cbnz when possible on arm64. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 1 month ago
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Index: src/compiler/arm64/code-generator-arm64.cc
diff --git a/src/compiler/arm64/code-generator-arm64.cc b/src/compiler/arm64/code-generator-arm64.cc
index 41d4c5458d2bcb0c622e51ae931d9c5ddd8c92bc..f48a7239e0f8085de3a5b39bddc204e11d2395a0 100644
--- a/src/compiler/arm64/code-generator-arm64.cc
+++ b/src/compiler/arm64/code-generator-arm64.cc
@@ -172,12 +172,10 @@ class Arm64OperandConverter FINAL : public InstructionOperandConverter {
} while (0)
-#define ASSEMBLE_TEST_AND_BRANCH(asm_instr, width) \
- do { \
- bool fallthrough = IsNextInAssemblyOrder(i.InputRpo(3)); \
- __ asm_instr(i.InputRegister##width(0), i.InputInt6(1), \
- GetLabel(i.InputRpo(2))); \
- if (!fallthrough) __ B(GetLabel(i.InputRpo(3))); \
+#define ASSEMBLE_BRANCH_TO(target) \
+ do { \
+ bool fallthrough = IsNextInAssemblyOrder(target); \
+ if (!fallthrough) __ B(GetLabel(target)); \
} while (0)
@@ -430,16 +428,28 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
i.InputInt8(2));
break;
case kArm64Tbz:
- ASSEMBLE_TEST_AND_BRANCH(Tbz, 64);
+ __ Tbz(i.InputRegister64(0), i.InputInt6(1), GetLabel(i.InputRpo(2)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(3));
break;
case kArm64Tbz32:
- ASSEMBLE_TEST_AND_BRANCH(Tbz, 32);
+ __ Tbz(i.InputRegister32(0), i.InputInt5(1), GetLabel(i.InputRpo(2)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(3));
break;
case kArm64Tbnz:
- ASSEMBLE_TEST_AND_BRANCH(Tbnz, 64);
+ __ Tbnz(i.InputRegister64(0), i.InputInt6(1), GetLabel(i.InputRpo(2)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(3));
break;
case kArm64Tbnz32:
- ASSEMBLE_TEST_AND_BRANCH(Tbnz, 32);
+ __ Tbnz(i.InputRegister32(0), i.InputInt5(1), GetLabel(i.InputRpo(2)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(3));
+ break;
+ case kArm64Cbz32:
+ __ Cbz(i.InputRegister32(0), GetLabel(i.InputRpo(1)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(2));
+ break;
+ case kArm64Cbnz32:
+ __ Cbnz(i.InputRegister32(0), GetLabel(i.InputRpo(1)));
+ ASSEMBLE_BRANCH_TO(i.InputRpo(2));
break;
case kArm64Claim: {
int words = MiscField::decode(instr->opcode());
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