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Issue 712993005: Infer range for BIT_XOR. (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Created 6 years, 1 month ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64.
6 #if defined(TARGET_ARCH_ARM64) 6 #if defined(TARGET_ARCH_ARM64)
7 7
8 #include "vm/flow_graph_compiler.h" 8 #include "vm/flow_graph_compiler.h"
9 9
10 #include "vm/ast_printer.h" 10 #include "vm/ast_printer.h"
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1593 ASSERT(destination.IsQuadStackSlot()); 1593 ASSERT(destination.IsQuadStackSlot());
1594 const intptr_t source_offset = source.ToStackSlotOffset(); 1594 const intptr_t source_offset = source.ToStackSlotOffset();
1595 const intptr_t dest_offset = destination.ToStackSlotOffset(); 1595 const intptr_t dest_offset = destination.ToStackSlotOffset();
1596 __ LoadQFromOffset(VTMP, source.base_reg(), source_offset, PP); 1596 __ LoadQFromOffset(VTMP, source.base_reg(), source_offset, PP);
1597 __ StoreQToOffset(VTMP, destination.base_reg(), dest_offset, PP); 1597 __ StoreQToOffset(VTMP, destination.base_reg(), dest_offset, PP);
1598 } 1598 }
1599 } else { 1599 } else {
1600 ASSERT(source.IsConstant()); 1600 ASSERT(source.IsConstant());
1601 const Object& constant = source.constant(); 1601 const Object& constant = source.constant();
1602 if (destination.IsRegister()) { 1602 if (destination.IsRegister()) {
1603 __ LoadObject(destination.reg(), constant, PP); 1603 if (constant.IsSmi() &&
1604 (source.constant_instruction()->representation() == kUnboxedInt32)) {
1605 __ LoadImmediate(destination.reg(),
1606 static_cast<int32_t>(Smi::Cast(constant).Value()),
1607 PP);
1608 } else {
1609 __ LoadObject(destination.reg(), constant, PP);
1610 }
1604 } else if (destination.IsFpuRegister()) { 1611 } else if (destination.IsFpuRegister()) {
1605 const VRegister dst = destination.fpu_reg(); 1612 const VRegister dst = destination.fpu_reg();
1606 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) { 1613 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) {
1607 __ veor(dst, dst, dst); 1614 __ veor(dst, dst, dst);
1608 } else { 1615 } else {
1609 ScratchRegisterScope tmp(this, kNoRegister); 1616 ScratchRegisterScope tmp(this, kNoRegister);
1610 __ LoadObject(tmp.reg(), constant, PP); 1617 __ LoadObject(tmp.reg(), constant, PP);
1611 __ LoadDFieldFromOffset(dst, tmp.reg(), Double::value_offset(), PP); 1618 __ LoadDFieldFromOffset(dst, tmp.reg(), Double::value_offset(), PP);
1612 } 1619 }
1613 } else if (destination.IsDoubleStackSlot()) { 1620 } else if (destination.IsDoubleStackSlot()) {
1614 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) { 1621 if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) {
1615 __ veor(VTMP, VTMP, VTMP); 1622 __ veor(VTMP, VTMP, VTMP);
1616 } else { 1623 } else {
1617 ScratchRegisterScope tmp(this, kNoRegister); 1624 ScratchRegisterScope tmp(this, kNoRegister);
1618 __ LoadObject(tmp.reg(), constant, PP); 1625 __ LoadObject(tmp.reg(), constant, PP);
1619 __ LoadDFieldFromOffset(VTMP, tmp.reg(), Double::value_offset(), PP); 1626 __ LoadDFieldFromOffset(VTMP, tmp.reg(), Double::value_offset(), PP);
1620 } 1627 }
1621 const intptr_t dest_offset = destination.ToStackSlotOffset(); 1628 const intptr_t dest_offset = destination.ToStackSlotOffset();
1622 __ StoreDToOffset(VTMP, destination.base_reg(), dest_offset, PP); 1629 __ StoreDToOffset(VTMP, destination.base_reg(), dest_offset, PP);
1623 } else { 1630 } else {
1624 ASSERT(destination.IsStackSlot()); 1631 ASSERT(destination.IsStackSlot());
1625 const intptr_t dest_offset = destination.ToStackSlotOffset(); 1632 const intptr_t dest_offset = destination.ToStackSlotOffset();
1626 ScratchRegisterScope tmp(this, kNoRegister); 1633 ScratchRegisterScope tmp(this, kNoRegister);
1627 __ LoadObject(tmp.reg(), constant, PP); 1634 if (constant.IsSmi() &&
1635 (source.constant_instruction()->representation() == kUnboxedInt32)) {
1636 __ LoadImmediate(tmp.reg(),
1637 static_cast<int32_t>(Smi::Cast(constant).Value()),
1638 PP);
1639 } else {
1640 __ LoadObject(tmp.reg(), constant, PP);
1641 }
1628 __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset, PP); 1642 __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset, PP);
1629 } 1643 }
1630 } 1644 }
1631 1645
1632 move->Eliminate(); 1646 move->Eliminate();
1633 } 1647 }
1634 1648
1635 1649
1636 void ParallelMoveResolver::EmitSwap(int index) { 1650 void ParallelMoveResolver::EmitSwap(int index) {
1637 MoveOperands* move = moves_[index]; 1651 MoveOperands* move = moves_[index];
(...skipping 154 matching lines...) Expand 10 before | Expand all | Expand 10 after
1792 void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) { 1806 void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) {
1793 __ PopDouble(reg); 1807 __ PopDouble(reg);
1794 } 1808 }
1795 1809
1796 1810
1797 #undef __ 1811 #undef __
1798 1812
1799 } // namespace dart 1813 } // namespace dart
1800 1814
1801 #endif // defined TARGET_ARCH_ARM64 1815 #endif // defined TARGET_ARCH_ARM64
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