Arm64: Remove forced csp alignment to 16 byte values for Nvidia chips.

src/arm64/macro-assembler-arm64-inl.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_
 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_
 
 #include <ctype.h>
 
 #include "src/globals.h"
@@ skipping 1226 matching lines @@
 void MacroAssembler::Uxtw(const Register& rd, const Register& rn) {
   DCHECK(allow_macro_instructions_);
   DCHECK(!rd.IsZero());
   uxtw(rd, rn);
 }
 
 
 void MacroAssembler::BumpSystemStackPointer(const Operand& space) {
   DCHECK(!csp.Is(sp_));
   if (!TmpList()->IsEmpty()) {
-    if (CpuFeatures::IsSupported(ALWAYS_ALIGN_CSP)) {
-      UseScratchRegisterScope temps(this);
-      Register temp = temps.AcquireX();
-      Sub(temp, StackPointer(), space);
-      Bic(csp, temp, 0xf);
-    } else {
-      Sub(csp, StackPointer(), space);
-    }
+    Sub(csp, StackPointer(), space);
   } else {
     // TODO(jbramley): Several callers rely on this not using scratch
     // registers, so we use the assembler directly here. However, this means
     // that large immediate values of 'space' cannot be handled cleanly. (Only
     // 24-bits immediates or values of 'space' that can be encoded in one
     // instruction are accepted.) Once we implement our flexible scratch
     // register idea, we could greatly simplify this function.
     InstructionAccurateScope scope(this);
     DCHECK(space.IsImmediate());
     // Align to 16 bytes.
@@ skipping 16 matching lines @@
     }
   }
   AssertStackConsistency();
 }
 
 
 void MacroAssembler::SyncSystemStackPointer() {
   DCHECK(emit_debug_code());
   DCHECK(!csp.Is(sp_));
   { InstructionAccurateScope scope(this);
-    if (CpuFeatures::IsSupported(ALWAYS_ALIGN_CSP)) {
-      bic(csp, StackPointer(), 0xf);
-    } else {
-      mov(csp, StackPointer());
-    }
+    mov(csp, StackPointer());
   }
   AssertStackConsistency();
 }
 
 
 void MacroAssembler::InitializeRootRegister() {
   ExternalReference roots_array_start =
       ExternalReference::roots_array_start(isolate());
   Mov(root, Operand(roots_array_start));
 }
@@ skipping 401 matching lines @@
   // characters are reserved for controlling features of the instrumentation.
   DCHECK(isprint(marker_name[0]) && isprint(marker_name[1]));
 
   InstructionAccurateScope scope(this, 1);
   movn(xzr, (marker_name[1] << 8) | marker_name[0]);
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_