Subzero: Implement InstList in terms of llvm::ilist<> .

src/IceTargetLoweringX8632.cpp

 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the TargetLoweringX8632 class, which
@@ skipping 3808 matching lines @@
       lowerArithmetic(NewArith);
       return;
     }
   }
 
   InstAssign *Assign = InstAssign::create(Func, Inst->getDest(), Src0);
   lowerAssign(Assign);
 }
 
 void TargetX8632::doAddressOptLoad() {
-  Inst *Inst = *Context.getCur();
+  Inst *Inst = Context.getCur();
   Variable *Dest = Inst->getDest();
   Operand *Addr = Inst->getSrc(0);
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   // Vanilla ICE load instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
@@ skipping 157 matching lines @@
     _store(ValueLo, llvm::cast<OperandX8632Mem>(loOperand(NewAddr)));
   } else if (isVectorType(Ty)) {
     _storep(legalizeToVar(Value), NewAddr);
   } else {
     Value = legalize(Value, Legal_Reg | Legal_Imm);
     _store(Value, NewAddr);
   }
 }
 
 void TargetX8632::doAddressOptStore() {
-  InstStore *Inst = llvm::cast<InstStore>(*Context.getCur());
+  InstStore *Inst = llvm::cast<InstStore>(Context.getCur());
   Operand *Data = Inst->getData();
   Operand *Addr = Inst->getAddr();
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
   // Vanilla ICE store instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
@@ skipping 477 matching lines @@
     Reg->setWeightInfinite();
   else
     Reg->setRegNum(RegNum);
   return Reg;
 }
 
 void TargetX8632::postLower() {
   if (Ctx->getOptLevel() != Opt_m1) {
     // Find two-address non-SSA instructions where Dest==Src0, and set
     // the DestNonKillable flag to keep liveness analysis consistent.
-    for (Inst *Inst : Context) {
+    for (auto Inst = Context.begin(), E = Context.end(); Inst != E; ++Inst) {
       if (Inst->isDeleted())
         continue;
       if (Variable *Dest = Inst->getDest()) {
         // TODO(stichnot): We may need to consider all source
         // operands, not just the first one, if using 3-address
         // instructions.
         if (Inst->getSrcSize() > 0 && Inst->getSrc(0) == Dest)
           Inst->setDestNonKillable();
       }
     }
     return;
   }
   // TODO: Avoid recomputing WhiteList every instruction.
   RegSetMask RegInclude = RegSet_All;
   RegSetMask RegExclude = RegSet_StackPointer;
   if (hasFramePointer())
     RegExclude |= RegSet_FramePointer;
   llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude);
   // Make one pass to black-list pre-colored registers.  TODO: If
   // there was some prior register allocation pass that made register
   // assignments, those registers need to be black-listed here as
   // well.
   llvm::DenseMap<const Variable *, const Inst *> LastUses;
   // The first pass also keeps track of which instruction is the last
   // use for each infinite-weight variable.  After the last use, the
   // variable is released to the free list.
-  for (Inst *Inst : Context) {
+  for (auto Inst = Context.begin(), E = Context.end(); Inst != E; ++Inst) {
     if (Inst->isDeleted())
       continue;
     // Don't consider a FakeKill instruction, because (currently) it
     // is only used to kill all scratch registers at a call site, and
     // we don't want to black-list all scratch registers during the
     // call lowering.  This could become a problem since it relies on
     // the lowering sequence not keeping any infinite-weight variables
     // live across a call.  TODO(stichnot): Consider replacing this
     // whole postLower() implementation with a robust local register
     // allocator, for example compute live ranges only for pre-colored
@@ skipping 10 matching lines @@
         LastUses[Var] = Inst;
         if (!Var->hasReg())
           continue;
         WhiteList[Var->getRegNum()] = false;
       }
     }
   }
   // The second pass colors infinite-weight variables.
   llvm::SmallBitVector AvailableRegisters = WhiteList;
   llvm::SmallBitVector FreedRegisters(WhiteList.size());
-  for (Inst *Inst : Context) {
+  for (auto Inst = Context.begin(), E = Context.end(); Inst != E; ++Inst) {
     FreedRegisters.reset();
     if (Inst->isDeleted())
       continue;
     // Iterate over all variables referenced in the instruction,
     // including the Dest variable (if any).  If the variable is
     // marked as infinite-weight, find it a register.  If this
     // instruction is the last use of the variable in the lowered
     // sequence, release the register to the free list after this
     // instruction is completely processed.  Note that the first pass
     // ignores the Dest operand, under the assumption that a
@@ skipping 150 matching lines @@
   } else if (IsConstant || IsExternal)
     Str << "\t.zero\t" << Size << "\n";
   // Size is part of .comm.
 
   if (IsConstant || HasNonzeroInitializer || IsExternal)
     Str << "\t.size\t" << MangledName << ", " << Size << "\n";
   // Size is part of .comm.
 }
 
 } // end of namespace Ice