Subzero: Implement InstList in terms of llvm::ilist<> .

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the CfgNode class, including the complexities
@@ skipping 41 matching lines @@
 
 // Renumbers the non-deleted instructions in the node.  This needs to
 // be done in preparation for live range analysis.  The instruction
 // numbers in a block must be monotonically increasing.  The range of
 // instruction numbers in a block, from lowest to highest, must not
 // overlap with the range of any other block.
 void CfgNode::renumberInstructions() {
   InstNumberT FirstNumber = Func->getNextInstNumber();
   for (InstPhi *I : Phis)
     I->renumber(Func);
-  for (Inst *I : Insts)
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I)
     I->renumber(Func);
   InstCountEstimate = Func->getNextInstNumber() - FirstNumber;
 }
 
 // When a node is created, the OutEdges are immediately known, but the
 // InEdges have to be built up incrementally.  After the CFG has been
 // constructed, the computePredecessors() pass finalizes it by
 // creating the InEdges list.
 void CfgNode::computePredecessors() {
-  OutEdges = (*Insts.rbegin())->getTerminatorEdges();
+  OutEdges = Insts.rbegin()->getTerminatorEdges();
   for (CfgNode *Succ : OutEdges)
     Succ->InEdges.push_back(this);
 }
 
 // This does part 1 of Phi lowering, by creating a new dest variable
 // for each Phi instruction, replacing the Phi instruction's dest with
 // that variable, and adding an explicit assignment of the old dest to
 // the new dest.  For example,
 //   a=phi(...)
 // changes to
@@ skipping 27 matching lines @@
   // Find the insertion point.
   InstList::iterator InsertionPoint = Insts.end();
   // Every block must end in a terminator instruction, and therefore
   // must have at least one instruction, so it's valid to decrement
   // InsertionPoint (but assert just in case).
   assert(InsertionPoint != Insts.begin());
   --InsertionPoint;
   // Confirm that InsertionPoint is a terminator instruction.  Calling
   // getTerminatorEdges() on a non-terminator instruction will cause
   // an llvm_unreachable().
-  (void)(*InsertionPoint)->getTerminatorEdges();
+  (void)InsertionPoint->getTerminatorEdges();
   // SafeInsertionPoint is always immediately before the terminator
   // instruction.  If the block ends in a compare and conditional
   // branch, it's better to place the Phi store before the compare so
   // as not to interfere with compare/branch fusing.  However, if the
   // compare instruction's dest operand is the same as the new
   // assignment statement's source operand, this can't be done due to
   // data dependences, so we need to fall back to the
   // SafeInsertionPoint.  To illustrate:
   //   ; <label>:95
   //   %97 = load i8* %96, align 1
@@ skipping 29 matching lines @@
   // but we could also do it here.
   InstList::iterator SafeInsertionPoint = InsertionPoint;
   // Keep track of the dest variable of a compare instruction, so that
   // we insert the new instruction at the SafeInsertionPoint if the
   // compare's dest matches the Phi-lowered assignment's source.
   Variable *CmpInstDest = NULL;
   // If the current insertion point is at a conditional branch
   // instruction, and the previous instruction is a compare
   // instruction, then we move the insertion point before the compare
   // instruction so as not to interfere with compare/branch fusing.
-  if (InstBr *Branch = llvm::dyn_cast<InstBr>(*InsertionPoint)) {
+  if (InstBr *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) {
     if (!Branch->isUnconditional()) {
       if (InsertionPoint != Insts.begin()) {
         --InsertionPoint;
-        if (llvm::isa<InstIcmp>(*InsertionPoint) ||
-            llvm::isa<InstFcmp>(*InsertionPoint)) {
-          CmpInstDest = (*InsertionPoint)->getDest();
+        if (llvm::isa<InstIcmp>(InsertionPoint) ||
+            llvm::isa<InstFcmp>(InsertionPoint)) {
+          CmpInstDest = InsertionPoint->getDest();
         } else {
           ++InsertionPoint;
         }
       }
     }
   }
 
   // Consider every out-edge.
   for (CfgNode *Succ : OutEdges) {
     // Consider every Phi instruction at the out-edge.
@@ skipping 56 matching lines @@
       *I = NewNode;
       NewNode->OutEdges.push_back(this);
       Found = true;
     }
   }
   assert(Found);
   // Repoint a suitable branch instruction's target.
   Found = false;
   for (auto I = Pred->getInsts().rbegin(), E = Pred->getInsts().rend();
        !Found && I != E; ++I) {
-    if (!(*I)->isDeleted()) {
-      Found = (*I)->repointEdge(this, NewNode);
+    if (!I->isDeleted()) {
+      Found = I->repointEdge(this, NewNode);
     }
   }
   assert(Found);
   return NewNode;
 }
 
 namespace {
 
 // Helper function used by advancedPhiLowering().
 bool sameVarOrReg(const Variable *Var, const Operand *Opnd) {
@@ skipping 258 matching lines @@
   // Do preliminary lowering of the Phi instructions.
   Target->prelowerPhis();
 }
 
 void CfgNode::livenessLightweight() {
   SizeT NumVars = Func->getNumVariables();
   LivenessBV Live(NumVars);
   // Process regular instructions in reverse order.
   // TODO(stichnot): Use llvm::make_range with LLVM 3.5.
   for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
-    if ((*I)->isDeleted())
+    if (I->isDeleted())
       continue;
-    (*I)->livenessLightweight(Func, Live);
+    I->livenessLightweight(Func, Live);
   }
   for (InstPhi *I : Phis) {
     if (I->isDeleted())
       continue;
     I->livenessLightweight(Func, Live);
   }
 }
 
 // Performs liveness analysis on the block.  Returns true if the
 // incoming liveness changed from before, false if it stayed the same.
@@ skipping 20 matching lines @@
   for (CfgNode *Succ : OutEdges) {
     Live |= Liveness->getLiveIn(Succ);
     // Mark corresponding argument of phis in successor as live.
     for (InstPhi *I : Succ->Phis)
       I->livenessPhiOperand(Live, this, Liveness);
   }
   Liveness->getLiveOut(this) = Live;
 
   // Process regular instructions in reverse order.
   for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
-    if ((*I)->isDeleted())
+    if (I->isDeleted())
       continue;
-    (*I)->liveness((*I)->getNumber(), Live, Liveness, LiveBegin, LiveEnd);
+    I->liveness(I->getNumber(), Live, Liveness, LiveBegin, LiveEnd);
   }
   // Process phis in forward order so that we can override the
   // instruction number to be that of the earliest phi instruction in
   // the block.
   SizeT NumNonDeadPhis = 0;
   InstNumberT FirstPhiNumber = Inst::NumberSentinel;
   for (InstPhi *I : Phis) {
     if (I->isDeleted())
       continue;
     if (FirstPhiNumber == Inst::NumberSentinel)
@@ skipping 58 matching lines @@
   for (InstPhi *I : Phis) {
     I->deleteIfDead();
     if (I->isDeleted())
       continue;
     if (FirstInstNum == Inst::NumberSentinel)
       FirstInstNum = I->getNumber();
     assert(I->getNumber() > LastInstNum);
     LastInstNum = I->getNumber();
   }
   // Process instructions
-  for (Inst *I : Insts) {
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
     I->deleteIfDead();
     if (I->isDeleted())
       continue;
     if (FirstInstNum == Inst::NumberSentinel)
       FirstInstNum = I->getNumber();
     assert(I->getNumber() > LastInstNum);
     LastInstNum = I->getNumber();
     // Create fake live ranges for a Kill instruction, but only if the
     // linked instruction is still alive.
     if (Mode == Liveness_Intervals) {
@@ skipping 78 matching lines @@
   }
 }
 
 // If this node contains only deleted instructions, and ends in an
 // unconditional branch, contract the node by repointing all its
 // in-edges to its successor.
 void CfgNode::contractIfEmpty() {
   if (InEdges.empty())
     return;
   Inst *Branch = NULL;
-  for (Inst *I : Insts) {
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
     if (I->isDeleted())
       continue;
     if (I->isUnconditionalBranch())
       Branch = I;
     else if (!I->isRedundantAssign())
       return;
   }
   Branch->setDeleted();
   assert(OutEdges.size() == 1);
   // Repoint all this node's in-edges to this node's successor, unless
   // this node's successor is actually itself (in which case the
   // statement "OutEdges.front()->InEdges.push_back(Pred)" could
   // invalidate the iterator over this->InEdges).
   if (OutEdges.front() != this) {
     for (CfgNode *Pred : InEdges) {
       for (auto I = Pred->OutEdges.begin(), E = Pred->OutEdges.end(); I != E;
            ++I) {
         if (*I == this) {
           *I = OutEdges.front();
           OutEdges.front()->InEdges.push_back(Pred);
         }
       }
-      for (Inst *I : Pred->getInsts()) {
+      for (auto I = Pred->getInsts().begin(), E = Pred->getInsts().end();
+           I != E; ++I) {
         if (!I->isDeleted())
           I->repointEdge(this, OutEdges.front());
       }
     }
   }
   InEdges.clear();
   // Don't bother removing the single out-edge, which would also
   // require finding the corresponding in-edge in the successor and
   // removing it.
 }
 
 void CfgNode::doBranchOpt(const CfgNode *NextNode) {
   TargetLowering *Target = Func->getTarget();
   // Check every instruction for a branch optimization opportunity.
   // It may be more efficient to iterate in reverse and stop after the
   // first opportunity, unless there is some target lowering where we
   // have the possibility of multiple such optimizations per block
   // (currently not the case for x86 lowering).
-  for (Inst *I : Insts) {
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
     if (!I->isDeleted()) {
       Target->doBranchOpt(I, NextNode);
     }
   }
 }
 
 // ======================== Dump routines ======================== //
 
 namespace {
 
@@ skipping 85 matching lines @@
   if (DecorateAsm)
     emitRegisterUsage(Str, Func, this, true, LiveRegCount);
 
   for (InstPhi *Phi : Phis) {
     if (Phi->isDeleted())
       continue;
     // Emitting a Phi instruction should cause an error.
     Inst *Instr = Phi;
     Instr->emit(Func);
   }
-  for (Inst *I : Insts) {
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
     if (I->isDeleted())
       continue;
     if (I->isRedundantAssign()) {
       Variable *Dest = I->getDest();
       if (DecorateAsm && Dest->hasReg() && !I->isLastUse(I->getSrc(0)))
         ++LiveRegCount[Dest->getRegNum()];
       continue;
     }
     I->emit(Func);
     if (DecorateAsm)
       emitLiveRangesEnded(Str, Func, I, LiveRegCount);
     Str << "\n";
     updateStats(Func, I);
   }
   if (DecorateAsm)
     emitRegisterUsage(Str, Func, this, false, LiveRegCount);
 }
 
 void CfgNode::emitIAS(Cfg *Func) const {
   Func->setCurrentNode(this);
   Assembler *Asm = Func->getAssembler<Assembler>();
   Asm->BindCfgNodeLabel(getIndex());
   for (InstPhi *Phi : Phis) {
     if (Phi->isDeleted())
       continue;
     // Emitting a Phi instruction should cause an error.
     Inst *Instr = Phi;
     Instr->emitIAS(Func);
   }
-  for (Inst *I : Insts) {
+  for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
     if (I->isDeleted())
       continue;
     if (I->isRedundantAssign())
       continue;
     I->emitIAS(Func);
     updateStats(Func, I);
   }
 }
 
 void CfgNode::dump(Cfg *Func) const {
@@ skipping 30 matching lines @@
                                                       Var->getType());
         }
       }
     }
     Str << "\n";
   }
   // Dump each instruction.
   if (Func->getContext()->isVerbose(IceV_Instructions)) {
     for (InstPhi *I : Phis)
       I->dumpDecorated(Func);
-    for (Inst *I : Insts)
+    for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I)
       I->dumpDecorated(Func);
   }
   // Dump the live-out variables.
   LivenessBV LiveOut;
   if (Liveness)
     LiveOut = Liveness->getLiveOut(this);
   if (Func->getContext()->isVerbose(IceV_Liveness) && !LiveOut.empty()) {
     Str << "    // LiveOut:";
     for (SizeT i = 0; i < LiveOut.size(); ++i) {
       if (LiveOut[i]) {
@@ skipping 15 matching lines @@
       if (!First)
         Str << ", ";
       First = false;
       Str << "%" << I->getName();
     }
     Str << "\n";
   }
 }
 
 } // end of namespace Ice