Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(458)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: build/toolchain.gypi

Issue 707883002: MIPS: Resolve chromium and android webview build conflicts. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix typo mistakes and comments. Created 6 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « build/standalone.gypi ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 # Copyright 2013 the V8 project authors. All rights reserved. 1 # Copyright 2013 the V8 project authors. All rights reserved.
2 # Redistribution and use in source and binary forms, with or without 2 # Redistribution and use in source and binary forms, with or without
3 # modification, are permitted provided that the following conditions are 3 # modification, are permitted provided that the following conditions are
4 # met: 4 # met:
5 # 5 #
6 # * Redistributions of source code must retain the above copyright 6 # * Redistributions of source code must retain the above copyright
7 # notice, this list of conditions and the following disclaimer. 7 # notice, this list of conditions and the following disclaimer.
8 # * Redistributions in binary form must reproduce the above 8 # * Redistributions in binary form must reproduce the above
9 # copyright notice, this list of conditions and the following 9 # copyright notice, this list of conditions and the following
10 # disclaimer in the documentation and/or other materials provided 10 # disclaimer in the documentation and/or other materials provided
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
48 # on the target. 48 # on the target.
49 'v8_can_use_vfp32dregs%': 'false', 49 'v8_can_use_vfp32dregs%': 'false',
50 'arm_test_noprobe%': 'off', 50 'arm_test_noprobe%': 'off',
51 51
52 # Similar to vfp but on MIPS. 52 # Similar to vfp but on MIPS.
53 'v8_can_use_fpu_instructions%': 'true', 53 'v8_can_use_fpu_instructions%': 'true',
54 54
55 # Similar to the ARM hard float ABI but on MIPS. 55 # Similar to the ARM hard float ABI but on MIPS.
56 'v8_use_mips_abi_hardfloat%': 'true', 56 'v8_use_mips_abi_hardfloat%': 'true',
57 57
58 # Default arch variant for MIPS.
59 'mips_arch_variant%': 'r2',
60
61 # Possible values fp32, fp64, fpxx.
62 # fp32 - 32 32-bit FPU registers are available, doubles are placed in
63 # register pairs.
64 # fp64 - 32 64-bit FPU registers are available.
65 # fpxx - compatibility mode, it chooses fp32 or fp64 depending on runtime
66 # detection
67 'mips_fpu_mode%': 'fp32',
68
69 'v8_enable_backtrace%': 0, 58 'v8_enable_backtrace%': 0,
70 59
71 # Enable profiling support. Only required on Windows. 60 # Enable profiling support. Only required on Windows.
72 'v8_enable_prof%': 0, 61 'v8_enable_prof%': 0,
73 62
74 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing. 63 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing.
75 'v8_no_strict_aliasing%': 0, 64 'v8_no_strict_aliasing%': 0,
76 65
77 # Chrome needs this definition unconditionally. For standalone V8 builds, 66 # Chrome needs this definition unconditionally. For standalone V8 builds,
78 # it's handled in build/standalone.gypi. 67 # it's handled in build/standalone.gypi.
(...skipping 192 matching lines...) Expand 10 before | Expand all | Expand 10 after
271 'defines': [ 260 'defines': [
272 'V8_TARGET_ARCH_X87', 261 'V8_TARGET_ARCH_X87',
273 ], 262 ],
274 'cflags': ['-march=i586'], 263 'cflags': ['-march=i586'],
275 }], # v8_target_arch=="x87" 264 }], # v8_target_arch=="x87"
276 ['v8_target_arch=="mips"', { 265 ['v8_target_arch=="mips"', {
277 'defines': [ 266 'defines': [
278 'V8_TARGET_ARCH_MIPS', 267 'V8_TARGET_ARCH_MIPS',
279 ], 268 ],
280 'conditions': [ 269 'conditions': [
281 ['v8_target_arch==target_arch and android_webview_build==0', { 270 [ 'v8_can_use_fpu_instructions=="true"', {
282 # Target built with a Mips CXX compiler. 271 'defines': [
283 'target_conditions': [ 272 'CAN_USE_FPU_INSTRUCTIONS',
284 ['_toolset=="target"', { 273 ],
274 }],
275 [ 'v8_use_mips_abi_hardfloat=="true"', {
276 'defines': [
277 '__mips_hard_float=1',
278 'CAN_USE_FPU_INSTRUCTIONS',
279 ],
280 }, {
281 'defines': [
282 '__mips_soft_float=1'
283 ]
284 }],
285 ],
286 'target_conditions': [
287 ['_toolset=="target"', {
288 'conditions': [
289 ['v8_target_arch==target and android_webview_build==0', {
paul.l... 2014/11/07 18:14:57 'target' needs to be 'target_arch' here.
dusmil.imgtec 2014/11/07 19:06:22 Done.
290 # Target built with a Mips CXX compiler.
285 'cflags': ['-EB'], 291 'cflags': ['-EB'],
286 'ldflags': ['-EB'], 292 'ldflags': ['-EB'],
287 'conditions': [ 293 'conditions': [
288 [ 'v8_use_mips_abi_hardfloat=="true"', { 294 [ 'v8_use_mips_abi_hardfloat=="true"', {
289 'cflags': ['-mhard-float'], 295 'cflags': ['-mhard-float'],
290 'ldflags': ['-mhard-float'], 296 'ldflags': ['-mhard-float'],
291 }, { 297 }, {
292 'cflags': ['-msoft-float'], 298 'cflags': ['-msoft-float'],
293 'ldflags': ['-msoft-float'], 299 'ldflags': ['-msoft-float'],
294 }], 300 }],
295 ['mips_fpu_mode=="fp64"', {
296 'cflags': ['-mfp64'],
297 }],
298 ['mips_fpu_mode=="fpxx"', {
299 'cflags': ['-mfpxx'],
300 }],
301 ['mips_fpu_mode=="fp32"', {
302 'cflags': ['-mfp32'],
303 }],
304 ['mips_arch_variant=="r6"', { 301 ['mips_arch_variant=="r6"', {
302 'defines': [
303 '_MIPS_ARCH_MIPS32R6',
304 'FPU_MODE_FP64',
305 ],
305 'cflags!': ['-mfp32', '-mfpxx'], 306 'cflags!': ['-mfp32', '-mfpxx'],
306 'cflags': ['-mips32r6', '-Wa,-mips32r6'], 307 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
307 'ldflags': [ 308 'ldflags': [
308 '-mips32r6', 309 '-mips32r6',
309 '-Wl,--dynamic-linker=$(LDSO_PATH)', 310 '-Wl,--dynamic-linker=$(LDSO_PATH)',
310 '-Wl,--rpath=$(LD_R_PATH)', 311 '-Wl,--rpath=$(LD_R_PATH)',
311 ], 312 ],
312 }], 313 }],
313 ['mips_arch_variant=="r2"', { 314 ['mips_arch_variant=="r2"', {
315 'conditions': [
316 [ 'mips_fpu_mode=="fp64"', {
317 'defines': [
318 '_MIPS_ARCH_MIPS32R2',
319 'FPU_MODE_FP64',
paul.l... 2014/11/07 18:14:57 Need to add '-mfp64' to 'cflags' here, and '-mfpxx
dusmil.imgtec 2014/11/07 19:06:22 Done.
dusmil.imgtec 2014/11/07 19:06:22 Thank you for spotting this.
320 ],
321 }],
322 ['mips_fpu_mode=="fpxx"', {
323 'defines': [
324 '_MIPS_ARCH_MIPS32R2',
325 'FPU_MODE_FPXX',
326 ],
327 }],
328 ['mips_fpu_mode=="fp32"', {
329 'defines': [
330 '_MIPS_ARCH_MIPS32R2',
331 'FPU_MODE_FP32',
332 ],
333 }],
334 ],
314 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 335 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
315 'ldflags': ['-mips32r2'], 336 'ldflags': ['-mips32r2'],
316 }], 337 }],
317 ['mips_arch_variant=="r1"', { 338 ['mips_arch_variant=="r1"', {
339 'defines': [
340 'FPU_MODE_FP32',
341 ],
318 'cflags!': ['-mfp64', '-mfpxx'], 342 'cflags!': ['-mfp64', '-mfpxx'],
319 'cflags': ['-mips32', '-Wa,-mips32'], 343 'cflags': ['-mips32', '-Wa,-mips32'],
320 'ldflags': ['-mips32'], 344 'ldflags': ['-mips32'],
321 }], 345 }],
322 ['mips_arch_variant=="rx"', { 346 ['mips_arch_variant=="rx"', {
347 'defines': [
348 '_MIPS_ARCH_MIPS32RX',
349 'FPU_MODE_FPXX',
350 ],
323 'cflags!': ['-mfp64', '-mfp32'], 351 'cflags!': ['-mfp64', '-mfp32'],
324 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'], 352 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'],
325 'ldflags': ['-mips32'], 353 'ldflags': ['-mips32'],
326 }], 354 }],
327 ], 355 ],
328 }], 356 }],
329 ], 357 ],
330 }], 358 }], #_toolset=="target"
359 ['_toolset=="host"', {
360 'conditions': [
361 ['mips_arch_variant=="rx"', {
362 'defines': [
363 '_MIPS_ARCH_MIPS32RX',
364 'FPU_MODE_FPXX',
365 ],
366 }],
367 ['mips_arch_variant=="r6"', {
368 'defines': [
369 '_MIPS_ARCH_MIPS32R6',
370 'FPU_MODE_FP64',
371 ],
372 }],
373 ['mips_arch_variant=="r2"', {
374 'conditions': [
375 ['mips_fpu_mode=="fp64"', {
376 'defines': [
377 '_MIPS_ARCH_MIPS32R2',
378 'FPU_MODE_FP64',
379 ],
380 }],
381 ['mips_fpu_mode=="fpxx"', {
382 'defines': [
383 '_MIPS_ARCH_MIPS32R2',
384 'FPU_MODE_FPXX',
385 ],
386 }],
387 ['mips_fpu_mode=="fp32"', {
388 'defines': [
389 '_MIPS_ARCH_MIPS32R2',
390 'FPU_MODE_FP32'
391 ],
392 }],
393 ],
394 }],
395 ['mips_arch_variant=="r1"', {
396 'defines': ['FPU_MODE_FP32',],
397 }],
398 ]
399 }], #_toolset=="host"
400 ],
401 }], # v8_target_arch=="mips"
402 ['v8_target_arch=="mipsel"', {
403 'defines': [
404 'V8_TARGET_ARCH_MIPS',
405 ],
406 'conditions': [
331 [ 'v8_can_use_fpu_instructions=="true"', { 407 [ 'v8_can_use_fpu_instructions=="true"', {
332 'defines': [ 408 'defines': [
333 'CAN_USE_FPU_INSTRUCTIONS', 409 'CAN_USE_FPU_INSTRUCTIONS',
334 ], 410 ],
335 }], 411 }],
336 [ 'v8_use_mips_abi_hardfloat=="true"', { 412 [ 'v8_use_mips_abi_hardfloat=="true"', {
337 'defines': [ 413 'defines': [
338 '__mips_hard_float=1', 414 '__mips_hard_float=1',
339 'CAN_USE_FPU_INSTRUCTIONS', 415 'CAN_USE_FPU_INSTRUCTIONS',
340 ], 416 ],
341 }, { 417 }, {
342 'defines': [ 418 'defines': [
343 '__mips_soft_float=1' 419 '__mips_soft_float=1'
344 ], 420 ],
345 }], 421 }],
346 ['mips_arch_variant=="rx"', { 422 ],
347 'defines': [ 423 'target_conditions': [
348 '_MIPS_ARCH_MIPS32RX', 424 ['_toolset=="target"', {
349 'FPU_MODE_FPXX',
350 ],
351 }],
352 ['mips_arch_variant=="r6"', {
353 'defines': [
354 '_MIPS_ARCH_MIPS32R6',
355 'FPU_MODE_FP64',
356 ],
357 }],
358 ['mips_arch_variant=="r2"', {
359 'defines': ['_MIPS_ARCH_MIPS32R2',],
360 'conditions': [ 425 'conditions': [
361 ['mips_fpu_mode=="fp64"', { 426 ['v8_target_arch==target_arch and android_webview_build==0', {
362 'defines': ['FPU_MODE_FP64',], 427 # Target built with a Mips CXX compiler.
363 }],
364 ['mips_fpu_mode=="fpxx"', {
365 'defines': ['FPU_MODE_FPXX',],
366 }],
367 ['mips_fpu_mode=="fp32"', {
368 'defines': ['FPU_MODE_FP32',],
369 }],
370 ],
371 }],
372 ['mips_arch_variant=="r1"', {
373 'defines': ['FPU_MODE_FP32',],
374 }],
375 ],
376 }], # v8_target_arch=="mips"
377 ['v8_target_arch=="mipsel"', {
378 'defines': [
379 'V8_TARGET_ARCH_MIPS',
380 ],
381 'conditions': [
382 ['v8_target_arch==target_arch and android_webview_build==0', {
383 # Target built with a Mips CXX compiler.
384 'target_conditions': [
385 ['_toolset=="target"', {
386 'cflags': ['-EL'], 428 'cflags': ['-EL'],
387 'ldflags': ['-EL'], 429 'ldflags': ['-EL'],
388 'conditions': [ 430 'conditions': [
389 [ 'v8_use_mips_abi_hardfloat=="true"', { 431 [ 'v8_use_mips_abi_hardfloat=="true"', {
390 'cflags': ['-mhard-float'], 432 'cflags': ['-mhard-float'],
391 'ldflags': ['-mhard-float'], 433 'ldflags': ['-mhard-float'],
392 }, { 434 }, {
393 'cflags': ['-msoft-float'], 435 'cflags': ['-msoft-float'],
394 'ldflags': ['-msoft-float'], 436 'ldflags': ['-msoft-float'],
395 }], 437 }],
396 ['mips_fpu_mode=="fp64"', {
397 'cflags': ['-mfp64'],
398 }],
399 ['mips_fpu_mode=="fpxx"', {
400 'cflags': ['-mfpxx'],
401 }],
402 ['mips_fpu_mode=="fp32"', {
403 'cflags': ['-mfp32'],
404 }],
405 ['mips_arch_variant=="r6"', { 438 ['mips_arch_variant=="r6"', {
439 'defines': [
440 '_MIPS_ARCH_MIPS32R6',
441 'FPU_MODE_FP64',
442 ],
406 'cflags!': ['-mfp32', '-mfpxx'], 443 'cflags!': ['-mfp32', '-mfpxx'],
407 'cflags': ['-mips32r6', '-Wa,-mips32r6'], 444 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
408 'ldflags': [ 445 'ldflags': [
409 '-mips32r6', 446 '-mips32r6',
410 '-Wl,--dynamic-linker=$(LDSO_PATH)', 447 '-Wl,--dynamic-linker=$(LDSO_PATH)',
411 '-Wl,--rpath=$(LD_R_PATH)', 448 '-Wl,--rpath=$(LD_R_PATH)',
412 ], 449 ],
413 }], 450 }],
414 ['mips_arch_variant=="r2"', { 451 ['mips_arch_variant=="r2"', {
452 'conditions': [
453 [ 'mips_fpu_mode=="fp64"', {
454 'defines': [
455 '_MIPS_ARCH_MIPS32R2',
paul.l... 2014/11/07 18:14:57 Need 'cflags' set to mfp64, -mfpxx, -mfpxx in thes
dusmil.imgtec 2014/11/07 19:06:22 Done.
456 'FPU_MODE_FP64',
457 ],
458 }],
459 ['mips_fpu_mode=="fpxx"', {
460 'defines': [
461 '_MIPS_ARCH_MIPS32R2',
462 'FPU_MODE_FPXX',
463 ],
464 }],
465 ['mips_fpu_mode=="fp32"', {
466 'defines': [
467 '_MIPS_ARCH_MIPS32R2',
468 'FPU_MODE_FP32',
469 ],
470 }],
471 ],
415 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 472 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
416 'ldflags': ['-mips32r2'], 473 'ldflags': ['-mips32r2'],
417 }], 474 }],
418 ['mips_arch_variant=="r1"', { 475 ['mips_arch_variant=="r1"', {
419 'cflags!': ['-mfp64', '-mfpxx'], 476 'cflags!': ['-mfp64', '-mfpxx'],
420 'cflags': ['-mips32', '-Wa,-mips32'], 477 'cflags': ['-mips32', '-Wa,-mips32'],
421 'ldflags': ['-mips32'], 478 'ldflags': ['-mips32'],
422 }], 479 }],
423 ['mips_arch_variant=="rx"', { 480 ['mips_arch_variant=="rx"', {
481 'defines': [
482 '_MIPS_ARCH_MIPS32RX',
483 'FPU_MODE_FPXX',
484 ],
424 'cflags!': ['-mfp64', '-mfp32'], 485 'cflags!': ['-mfp64', '-mfp32'],
425 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'], 486 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'],
426 'ldflags': ['-mips32'], 487 'ldflags': ['-mips32'],
427 }], 488 }],
428 ['mips_arch_variant=="loongson"', { 489 ['mips_arch_variant=="loongson"', {
429 'cflags!': ['-mfp64', '-mfp32', '-mfpxx'], 490 'cflags!': ['-mfp64', '-mfp32', '-mfpxx'],
430 'cflags': ['-mips3', '-Wa,-mips3'], 491 'cflags': ['-mips3', '-Wa,-mips3'],
431 }], 492 }],
432 ], 493 ],
433 }], 494 }],
434 ], 495 ],
435 }], 496 }], #_toolset=="target
436 [ 'v8_can_use_fpu_instructions=="true"', { 497 ['_toolset=="host"', {
437 'defines': [
438 'CAN_USE_FPU_INSTRUCTIONS',
439 ],
440 }],
441 [ 'v8_use_mips_abi_hardfloat=="true"', {
442 'defines': [
443 '__mips_hard_float=1',
444 'CAN_USE_FPU_INSTRUCTIONS',
445 ],
446 }, {
447 'defines': [
448 '__mips_soft_float=1'
449 ],
450 }],
451 ['mips_arch_variant=="rx"', {
452 'defines': [
453 '_MIPS_ARCH_MIPS32RX',
454 'FPU_MODE_FPXX',
455 ],
456 }],
457 ['mips_arch_variant=="r6"', {
458 'defines': [
459 '_MIPS_ARCH_MIPS32R6',
460 'FPU_MODE_FP64',
461 ],
462 }],
463 ['mips_arch_variant=="r2"', {
464 'defines': ['_MIPS_ARCH_MIPS32R2',],
465 'conditions': [ 498 'conditions': [
466 ['mips_fpu_mode=="fp64"', { 499 ['mips_arch_variant=="rx"', {
467 'defines': ['FPU_MODE_FP64',], 500 'defines': [
501 '_MIPS_ARCH_MIPS32RX',
502 'FPU_MODE_FPXX',
503 ],
468 }], 504 }],
469 ['mips_fpu_mode=="fpxx"', { 505 ['mips_arch_variant=="r6"', {
470 'defines': ['FPU_MODE_FPXX',], 506 'defines': [
507 '_MIPS_ARCH_MIPS32R6',
508 'FPU_MODE_FP64',
509 ],
471 }], 510 }],
472 ['mips_fpu_mode=="fp32"', { 511 ['mips_arch_variant=="r2"', {
512 'conditions': [
513 ['mips_fpu_mode=="fp64"', {
514 'defines': [
515 '_MIPS_ARCH_MIPS32R2',
516 'FPU_MODE_FP64',
517 ],
518 }],
519 ['mips_fpu_mode=="fpxx"', {
520 'defines': [
521 '_MIPS_ARCH_MIPS32R2',
522 'FPU_MODE_FPXX',
523 ],
524 }],
525 ['mips_fpu_mode=="fp32"', {
526 'defines': [
527 '_MIPS_ARCH_MIPS32R2',
528 'FPU_MODE_FP32'
529 ],
530 }],
531 ],
532 }],
533 ['mips_arch_variant=="r1"', {
473 'defines': ['FPU_MODE_FP32',], 534 'defines': ['FPU_MODE_FP32',],
474 }], 535 }],
475 ], 536 ['mips_arch_variant=="loongson"', {
476 }], 537 'defines': [
477 ['mips_arch_variant=="r1"', { 538 '_MIPS_ARCH_LOONGSON',
478 'defines': ['FPU_MODE_FP32',], 539 'FPU_MODE_FP32',
479 }], 540 ],
480 ['mips_arch_variant=="loongson"', { 541 }],
481 'defines': [ 542 ]
482 '_MIPS_ARCH_LOONGSON',
483 'FPU_MODE_FP32',
484 ],
485 }], 543 }],
486 ], 544 ],
487 }], # v8_target_arch=="mipsel" 545 }], # v8_target_arch=="mipsel"
488 ['v8_target_arch=="mips64el"', { 546 ['v8_target_arch=="mips64el"', {
489 'defines': [ 547 'defines': [
490 'V8_TARGET_ARCH_MIPS64', 548 'V8_TARGET_ARCH_MIPS64',
491 ], 549 ],
492 'conditions': [ 550 'conditions': [
493 ['v8_target_arch==target_arch and android_webview_build==0', {
494 # Target built with a Mips CXX compiler.
495 'target_conditions': [
496 ['_toolset=="target"', {
497 'cflags': ['-EL'],
498 'ldflags': ['-EL'],
499 'conditions': [
500 [ 'v8_use_mips_abi_hardfloat=="true"', {
501 'cflags': ['-mhard-float'],
502 'ldflags': ['-mhard-float'],
503 }, {
504 'cflags': ['-msoft-float'],
505 'ldflags': ['-msoft-float'],
506 }],
507 ['mips_arch_variant=="r6"', {
508 'cflags': ['-mips64r6', '-mabi=64', '-Wa,-mips64r6'],
509 'ldflags': [
510 '-mips64r6', '-mabi=64',
511 '-Wl,--dynamic-linker=$(LDSO_PATH)',
512 '-Wl,--rpath=$(LD_R_PATH)',
513 ],
514 }],
515 ['mips_arch_variant=="r2"', {
516 'cflags': ['-mips64r2', '-mabi=64', '-Wa,-mips64r2'],
517 'ldflags': [
518 '-mips64r2', '-mabi=64',
519 '-Wl,--dynamic-linker=$(LDSO_PATH)',
520 '-Wl,--rpath=$(LD_R_PATH)',
521 ],
522 }],
523 ],
524 }],
525 ],
526 }],
527 [ 'v8_can_use_fpu_instructions=="true"', { 551 [ 'v8_can_use_fpu_instructions=="true"', {
528 'defines': [ 552 'defines': [
529 'CAN_USE_FPU_INSTRUCTIONS', 553 'CAN_USE_FPU_INSTRUCTIONS',
530 ], 554 ],
531 }], 555 }],
532 [ 'v8_use_mips_abi_hardfloat=="true"', { 556 [ 'v8_use_mips_abi_hardfloat=="true"', {
533 'defines': [ 557 'defines': [
534 '__mips_hard_float=1', 558 '__mips_hard_float=1',
535 'CAN_USE_FPU_INSTRUCTIONS', 559 'CAN_USE_FPU_INSTRUCTIONS',
536 ], 560 ],
537 }, { 561 }, {
538 'defines': [ 562 'defines': [
539 '__mips_soft_float=1' 563 '__mips_soft_float=1'
540 ], 564 ],
541 }], 565 }],
542 ['mips_arch_variant=="r6"', { 566 ],
543 'defines': ['_MIPS_ARCH_MIPS64R6',], 567 'target_conditions': [
544 }], 568 ['_toolset=="target"', {
545 ['mips_arch_variant=="r2"', { 569 'conditions': [
546 'defines': ['_MIPS_ARCH_MIPS64R2',], 570 ['v8_target_arch==target_arch and android_webview_build==0', {
547 }], 571 'cflags': ['-EL'],
572 'ldflags': ['-EL'],
573 'conditions': [
574 [ 'v8_use_mips_abi_hardfloat=="true"', {
575 'cflags': ['-mhard-float'],
576 'ldflags': ['-mhard-float'],
577 }, {
578 'cflags': ['-msoft-float'],
579 'ldflags': ['-msoft-float'],
580 }],
581 ['mips_arch_variant=="r6"', {
582 'defines': ['_MIPS_ARCH_MIPS64R6',],
583 'cflags': ['-mips64r6', '-mabi=64', '-Wa,-mips64r6'],
paul.l... 2014/11/07 18:14:57 We should probably do -mfp64 in here somewhere too
dusmil.imgtec 2014/11/07 19:06:23 there is no need for this, since mips64 always imp
584 'ldflags': [
585 '-mips64r6', '-mabi=64',
586 '-Wl,--dynamic-linker=$(LDSO_PATH)',
587 '-Wl,--rpath=$(LD_R_PATH)',
588 ],
589 }],
590 ['mips_arch_variant=="r2"', {
591 'defines': ['_MIPS_ARCH_MIPS64R2',],
592 'cflags': ['-mips64r2', '-mabi=64', '-Wa,-mips64r2'],
593 'ldflags': [
594 '-mips64r2', '-mabi=64',
595 '-Wl,--dynamic-linker=$(LDSO_PATH)',
596 '-Wl,--rpath=$(LD_R_PATH)',
597 ],
598 }],
599 ],
600 }],
601 ],
602 }], #'_toolset=="target"
603 ['_toolset=="host"', {
604 'conditions': [
605 ['mips_arch_variant=="r6"', {
606 'defines': ['_MIPS_ARCH_MIPS64R6',],
607 }],
608 ['mips_arch_variant=="r2"', {
609 'defines': ['_MIPS_ARCH_MIPS64R2',],
610 }],
611 ],
612 }], #'_toolset=="host"
548 ], 613 ],
549 }], # v8_target_arch=="mips64el" 614 }], # v8_target_arch=="mips64el"
550 ['v8_target_arch=="x64"', { 615 ['v8_target_arch=="x64"', {
551 'defines': [ 616 'defines': [
552 'V8_TARGET_ARCH_X64', 617 'V8_TARGET_ARCH_X64',
553 ], 618 ],
554 'xcode_settings': { 619 'xcode_settings': {
555 'ARCHS': [ 'x86_64' ], 620 'ARCHS': [ 'x86_64' ],
556 }, 621 },
557 'msvs_settings': { 622 'msvs_settings': {
(...skipping 414 matching lines...) Expand 10 before | Expand all | Expand 10 after
972 'OptimizeReferences': '2', 1037 'OptimizeReferences': '2',
973 'EnableCOMDATFolding': '2', 1038 'EnableCOMDATFolding': '2',
974 }, 1039 },
975 }, 1040 },
976 }], # OS=="win" 1041 }], # OS=="win"
977 ], # conditions 1042 ], # conditions
978 }, # Release 1043 }, # Release
979 }, # configurations 1044 }, # configurations
980 }, # target_defaults 1045 }, # target_defaults
981 } 1046 }
OLDNEW
« no previous file with comments | « build/standalone.gypi ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698