| Index: src/ia32/assembler-ia32.cc
|
| ===================================================================
|
| --- src/ia32/assembler-ia32.cc (revision 7948)
|
| +++ src/ia32/assembler-ia32.cc (working copy)
|
| @@ -354,7 +354,6 @@
|
| pc_ = buffer_;
|
| reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
|
|
|
| - last_pc_ = NULL;
|
| #ifdef GENERATED_CODE_COVERAGE
|
| InitCoverageLog();
|
| #endif
|
| @@ -402,7 +401,6 @@
|
| void Assembler::cpuid() {
|
| ASSERT(CpuFeatures::IsEnabled(CPUID));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA2);
|
| }
|
| @@ -410,35 +408,30 @@
|
|
|
| void Assembler::pushad() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x60);
|
| }
|
|
|
|
|
| void Assembler::popad() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x61);
|
| }
|
|
|
|
|
| void Assembler::pushfd() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9C);
|
| }
|
|
|
|
|
| void Assembler::popfd() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9D);
|
| }
|
|
|
|
|
| void Assembler::push(const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (x.is_int8()) {
|
| EMIT(0x6a);
|
| EMIT(x.x_);
|
| @@ -458,14 +451,12 @@
|
|
|
| void Assembler::push(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x50 | src.code());
|
| }
|
|
|
|
|
| void Assembler::push(const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(esi, src);
|
| }
|
| @@ -473,125 +464,13 @@
|
|
|
| void Assembler::pop(Register dst) {
|
| ASSERT(reloc_info_writer.last_pc() != NULL);
|
| - if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
|
| - // (last_pc_ != NULL) is rolled into the above check.
|
| - // If a last_pc_ is set, we need to make sure that there has not been any
|
| - // relocation information generated between the last instruction and this
|
| - // pop instruction.
|
| - byte instr = last_pc_[0];
|
| - if ((instr & ~0x7) == 0x50) {
|
| - int push_reg_code = instr & 0x7;
|
| - if (push_reg_code == dst.code()) {
|
| - pc_ = last_pc_;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (same reg) eliminated\n", pc_offset());
|
| - }
|
| - } else {
|
| - // Convert 'push src; pop dst' to 'mov dst, src'.
|
| - last_pc_[0] = 0x8b;
|
| - Register src = { push_reg_code };
|
| - EnsureSpace ensure_space(this);
|
| - emit_operand(dst, Operand(src));
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (reg->reg) eliminated\n", pc_offset());
|
| - }
|
| - }
|
| - last_pc_ = NULL;
|
| - return;
|
| - } else if (instr == 0xff) { // push of an operand, convert to a move
|
| - byte op1 = last_pc_[1];
|
| - // Check if the operation is really a push.
|
| - if ((op1 & 0x38) == (6 << 3)) {
|
| - op1 = (op1 & ~0x38) | static_cast<byte>(dst.code() << 3);
|
| - last_pc_[0] = 0x8b;
|
| - last_pc_[1] = op1;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (op->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if ((instr == 0x89) &&
|
| - (last_pc_[1] == 0x04) &&
|
| - (last_pc_[2] == 0x24)) {
|
| - // 0x71283c 396 890424 mov [esp],eax
|
| - // 0x71283f 399 58 pop eax
|
| - if (dst.is(eax)) {
|
| - // change to
|
| - // 0x710fac 216 83c404 add esp,0x4
|
| - last_pc_[0] = 0x83;
|
| - last_pc_[1] = 0xc4;
|
| - last_pc_[2] = 0x04;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (mov-pop) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if (instr == 0x6a && dst.is(eax)) { // push of immediate 8 bit
|
| - byte imm8 = last_pc_[1];
|
| - if (imm8 == 0) {
|
| - // 6a00 push 0x0
|
| - // 58 pop eax
|
| - last_pc_[0] = 0x31;
|
| - last_pc_[1] = 0xc0;
|
| - // change to
|
| - // 31c0 xor eax,eax
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - } else {
|
| - // 6a00 push 0xXX
|
| - // 58 pop eax
|
| - last_pc_[0] = 0xb8;
|
| - EnsureSpace ensure_space(this);
|
| - if ((imm8 & 0x80) != 0) {
|
| - EMIT(0xff);
|
| - EMIT(0xff);
|
| - EMIT(0xff);
|
| - // change to
|
| - // b8XXffffff mov eax,0xffffffXX
|
| - } else {
|
| - EMIT(0x00);
|
| - EMIT(0x00);
|
| - EMIT(0x00);
|
| - // change to
|
| - // b8XX000000 mov eax,0x000000XX
|
| - }
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if (instr == 0x68 && dst.is(eax)) { // push of immediate 32 bit
|
| - // 68XXXXXXXX push 0xXXXXXXXX
|
| - // 58 pop eax
|
| - last_pc_[0] = 0xb8;
|
| - last_pc_ = NULL;
|
| - // change to
|
| - // b8XXXXXXXX mov eax,0xXXXXXXXX
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| -
|
| - // Other potential patterns for peephole:
|
| - // 0x712716 102 890424 mov [esp], eax
|
| - // 0x712719 105 8b1424 mov edx, [esp]
|
| - }
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x58 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::pop(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8F);
|
| emit_operand(eax, dst);
|
| }
|
| @@ -599,7 +478,6 @@
|
|
|
| void Assembler::enter(const Immediate& size) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC8);
|
| emit_w(size);
|
| EMIT(0);
|
| @@ -608,7 +486,6 @@
|
|
|
| void Assembler::leave() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC9);
|
| }
|
|
|
| @@ -616,7 +493,6 @@
|
| void Assembler::mov_b(Register dst, const Operand& src) {
|
| ASSERT(dst.code() < 4);
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8A);
|
| emit_operand(dst, src);
|
| }
|
| @@ -624,7 +500,6 @@
|
|
|
| void Assembler::mov_b(const Operand& dst, int8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC6);
|
| emit_operand(eax, dst);
|
| EMIT(imm8);
|
| @@ -634,7 +509,6 @@
|
| void Assembler::mov_b(const Operand& dst, Register src) {
|
| ASSERT(src.code() < 4);
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x88);
|
| emit_operand(src, dst);
|
| }
|
| @@ -642,7 +516,6 @@
|
|
|
| void Assembler::mov_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x8B);
|
| emit_operand(dst, src);
|
| @@ -651,7 +524,6 @@
|
|
|
| void Assembler::mov_w(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x89);
|
| emit_operand(src, dst);
|
| @@ -660,7 +532,6 @@
|
|
|
| void Assembler::mov(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(imm32);
|
| }
|
| @@ -668,7 +539,6 @@
|
|
|
| void Assembler::mov(Register dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(x);
|
| }
|
| @@ -676,7 +546,6 @@
|
|
|
| void Assembler::mov(Register dst, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(handle);
|
| }
|
| @@ -684,7 +553,6 @@
|
|
|
| void Assembler::mov(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -692,7 +560,6 @@
|
|
|
| void Assembler::mov(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x89);
|
| EMIT(0xC0 | src.code() << 3 | dst.code());
|
| }
|
| @@ -700,7 +567,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC7);
|
| emit_operand(eax, dst);
|
| emit(x);
|
| @@ -709,7 +575,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC7);
|
| emit_operand(eax, dst);
|
| emit(handle);
|
| @@ -718,7 +583,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x89);
|
| emit_operand(src, dst);
|
| }
|
| @@ -726,7 +590,6 @@
|
|
|
| void Assembler::movsx_b(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xBE);
|
| emit_operand(dst, src);
|
| @@ -735,7 +598,6 @@
|
|
|
| void Assembler::movsx_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xBF);
|
| emit_operand(dst, src);
|
| @@ -744,7 +606,6 @@
|
|
|
| void Assembler::movzx_b(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xB6);
|
| emit_operand(dst, src);
|
| @@ -753,7 +614,6 @@
|
|
|
| void Assembler::movzx_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xB7);
|
| emit_operand(dst, src);
|
| @@ -763,7 +623,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| USE(cc);
|
| USE(dst);
|
| @@ -774,7 +633,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| USE(cc);
|
| USE(dst);
|
| @@ -785,7 +643,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| // Opcode: 0f 40 + cc /r.
|
| EMIT(0x0F);
|
| EMIT(0x40 + cc);
|
| @@ -795,14 +652,12 @@
|
|
|
| void Assembler::cld() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFC);
|
| }
|
|
|
|
|
| void Assembler::rep_movs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0xA5);
|
| }
|
| @@ -810,7 +665,6 @@
|
|
|
| void Assembler::rep_stos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0xAB);
|
| }
|
| @@ -818,14 +672,12 @@
|
|
|
| void Assembler::stos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xAB);
|
| }
|
|
|
|
|
| void Assembler::xchg(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (src.is(eax) || dst.is(eax)) { // Single-byte encoding.
|
| EMIT(0x90 | (src.is(eax) ? dst.code() : src.code()));
|
| } else {
|
| @@ -837,14 +689,12 @@
|
|
|
| void Assembler::adc(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(2, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::adc(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x13);
|
| emit_operand(dst, src);
|
| }
|
| @@ -852,7 +702,6 @@
|
|
|
| void Assembler::add(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x03);
|
| emit_operand(dst, src);
|
| }
|
| @@ -860,24 +709,7 @@
|
|
|
| void Assembler::add(const Operand& dst, const Immediate& x) {
|
| ASSERT(reloc_info_writer.last_pc() != NULL);
|
| - if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
|
| - byte instr = last_pc_[0];
|
| - if ((instr & 0xf8) == 0x50) {
|
| - // Last instruction was a push. Check whether this is a pop without a
|
| - // result.
|
| - if ((dst.is_reg(esp)) &&
|
| - (x.x_ == kPointerSize) && (x.rmode_ == RelocInfo::NONE)) {
|
| - pc_ = last_pc_;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop(noreg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - }
|
| - }
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(0, dst, x);
|
| }
|
|
|
| @@ -889,14 +721,12 @@
|
|
|
| void Assembler::and_(Register dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(4, Operand(dst), x);
|
| }
|
|
|
|
|
| void Assembler::and_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x23);
|
| emit_operand(dst, src);
|
| }
|
| @@ -904,14 +734,12 @@
|
|
|
| void Assembler::and_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(4, dst, x);
|
| }
|
|
|
|
|
| void Assembler::and_(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x21);
|
| emit_operand(src, dst);
|
| }
|
| @@ -919,7 +747,6 @@
|
|
|
| void Assembler::cmpb(const Operand& op, int8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (op.is_reg(eax)) {
|
| EMIT(0x3C);
|
| } else {
|
| @@ -933,7 +760,6 @@
|
| void Assembler::cmpb(const Operand& dst, Register src) {
|
| ASSERT(src.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x38);
|
| emit_operand(src, dst);
|
| }
|
| @@ -942,7 +768,6 @@
|
| void Assembler::cmpb(Register dst, const Operand& src) {
|
| ASSERT(dst.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x3A);
|
| emit_operand(dst, src);
|
| }
|
| @@ -951,7 +776,6 @@
|
| void Assembler::cmpw(const Operand& op, Immediate imm16) {
|
| ASSERT(imm16.is_int16());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x81);
|
| emit_operand(edi, op);
|
| @@ -961,21 +785,18 @@
|
|
|
| void Assembler::cmp(Register reg, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, Operand(reg), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::cmp(Register reg, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, Operand(reg), Immediate(handle));
|
| }
|
|
|
|
|
| void Assembler::cmp(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x3B);
|
| emit_operand(reg, op);
|
| }
|
| @@ -983,21 +804,18 @@
|
|
|
| void Assembler::cmp(const Operand& op, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, op, imm);
|
| }
|
|
|
|
|
| void Assembler::cmp(const Operand& op, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, op, Immediate(handle));
|
| }
|
|
|
|
|
| void Assembler::cmpb_al(const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x38); // CMP r/m8, r8
|
| emit_operand(eax, op); // eax has same code as register al.
|
| }
|
| @@ -1005,7 +823,6 @@
|
|
|
| void Assembler::cmpw_ax(const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x39); // CMP r/m16, r16
|
| emit_operand(eax, op); // eax has same code as register ax.
|
| @@ -1014,7 +831,6 @@
|
|
|
| void Assembler::dec_b(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFE);
|
| EMIT(0xC8 | dst.code());
|
| }
|
| @@ -1022,7 +838,6 @@
|
|
|
| void Assembler::dec_b(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFE);
|
| emit_operand(ecx, dst);
|
| }
|
| @@ -1030,14 +845,12 @@
|
|
|
| void Assembler::dec(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x48 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::dec(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(ecx, dst);
|
| }
|
| @@ -1045,14 +858,12 @@
|
|
|
| void Assembler::cdq() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x99);
|
| }
|
|
|
|
|
| void Assembler::idiv(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xF8 | src.code());
|
| }
|
| @@ -1060,7 +871,6 @@
|
|
|
| void Assembler::imul(Register reg) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xE8 | reg.code());
|
| }
|
| @@ -1068,7 +878,6 @@
|
|
|
| void Assembler::imul(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAF);
|
| emit_operand(dst, src);
|
| @@ -1077,7 +886,6 @@
|
|
|
| void Assembler::imul(Register dst, Register src, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (is_int8(imm32)) {
|
| EMIT(0x6B);
|
| EMIT(0xC0 | dst.code() << 3 | src.code());
|
| @@ -1092,14 +900,12 @@
|
|
|
| void Assembler::inc(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x40 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::inc(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(eax, dst);
|
| }
|
| @@ -1107,7 +913,6 @@
|
|
|
| void Assembler::lea(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8D);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1115,7 +920,6 @@
|
|
|
| void Assembler::mul(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xE0 | src.code());
|
| }
|
| @@ -1123,7 +927,6 @@
|
|
|
| void Assembler::neg(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xD8 | dst.code());
|
| }
|
| @@ -1131,7 +934,6 @@
|
|
|
| void Assembler::not_(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xD0 | dst.code());
|
| }
|
| @@ -1139,14 +941,12 @@
|
|
|
| void Assembler::or_(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(1, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::or_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1154,14 +954,12 @@
|
|
|
| void Assembler::or_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(1, dst, x);
|
| }
|
|
|
|
|
| void Assembler::or_(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x09);
|
| emit_operand(src, dst);
|
| }
|
| @@ -1169,7 +967,6 @@
|
|
|
| void Assembler::rcl(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1184,7 +981,6 @@
|
|
|
| void Assembler::rcr(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1199,7 +995,6 @@
|
|
|
| void Assembler::sar(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1214,7 +1009,6 @@
|
|
|
| void Assembler::sar_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xF8 | dst.code());
|
| }
|
| @@ -1222,7 +1016,6 @@
|
|
|
| void Assembler::sbb(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x1B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1230,7 +1023,6 @@
|
|
|
| void Assembler::shld(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA5);
|
| emit_operand(dst, src);
|
| @@ -1239,7 +1031,6 @@
|
|
|
| void Assembler::shl(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1254,7 +1045,6 @@
|
|
|
| void Assembler::shl_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xE0 | dst.code());
|
| }
|
| @@ -1262,7 +1052,6 @@
|
|
|
| void Assembler::shrd(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAD);
|
| emit_operand(dst, src);
|
| @@ -1271,7 +1060,6 @@
|
|
|
| void Assembler::shr(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1286,7 +1074,6 @@
|
|
|
| void Assembler::shr_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xE8 | dst.code());
|
| }
|
| @@ -1294,14 +1081,12 @@
|
|
|
| void Assembler::sub(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(5, dst, x);
|
| }
|
|
|
|
|
| void Assembler::sub(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x2B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1309,7 +1094,6 @@
|
|
|
| void Assembler::sub(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x29);
|
| emit_operand(src, dst);
|
| }
|
| @@ -1317,7 +1101,6 @@
|
|
|
| void Assembler::test(Register reg, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| // Only use test against byte for registers that have a byte
|
| // variant: eax, ebx, ecx, and edx.
|
| if (imm.rmode_ == RelocInfo::NONE && is_uint8(imm.x_) && reg.code() < 4) {
|
| @@ -1344,7 +1127,6 @@
|
|
|
| void Assembler::test(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x85);
|
| emit_operand(reg, op);
|
| }
|
| @@ -1352,7 +1134,6 @@
|
|
|
| void Assembler::test_b(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x84);
|
| emit_operand(reg, op);
|
| }
|
| @@ -1360,7 +1141,6 @@
|
|
|
| void Assembler::test(const Operand& op, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| emit_operand(eax, op);
|
| emit(imm);
|
| @@ -1373,7 +1153,6 @@
|
| return;
|
| }
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF6);
|
| emit_operand(eax, op);
|
| EMIT(imm8);
|
| @@ -1382,14 +1161,12 @@
|
|
|
| void Assembler::xor_(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(6, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::xor_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x33);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1397,7 +1174,6 @@
|
|
|
| void Assembler::xor_(const Operand& src, Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x31);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1405,14 +1181,12 @@
|
|
|
| void Assembler::xor_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(6, dst, x);
|
| }
|
|
|
|
|
| void Assembler::bt(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA3);
|
| emit_operand(src, dst);
|
| @@ -1421,7 +1195,6 @@
|
|
|
| void Assembler::bts(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAB);
|
| emit_operand(src, dst);
|
| @@ -1430,21 +1203,18 @@
|
|
|
| void Assembler::hlt() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF4);
|
| }
|
|
|
|
|
| void Assembler::int3() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xCC);
|
| }
|
|
|
|
|
| void Assembler::nop() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x90);
|
| }
|
|
|
| @@ -1452,7 +1222,6 @@
|
| void Assembler::rdtsc() {
|
| ASSERT(CpuFeatures::IsEnabled(RDTSC));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x31);
|
| }
|
| @@ -1460,7 +1229,6 @@
|
|
|
| void Assembler::ret(int imm16) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint16(imm16));
|
| if (imm16 == 0) {
|
| EMIT(0xC3);
|
| @@ -1506,7 +1274,6 @@
|
|
|
| void Assembler::bind_to(Label* L, int pos) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = NULL;
|
| ASSERT(0 <= pos && pos <= pc_offset()); // must have a valid binding position
|
| while (L->is_linked()) {
|
| Displacement disp = disp_at(L);
|
| @@ -1524,36 +1291,35 @@
|
| }
|
| disp.next(L);
|
| }
|
| + while (L->is_near_linked()) {
|
| + int fixup_pos = L->near_link_pos();
|
| + int offset_to_next =
|
| + static_cast<int>(*reinterpret_cast<int8_t*>(addr_at(fixup_pos)));
|
| + ASSERT(offset_to_next <= 0);
|
| + // Relative address, relative to point after address.
|
| + int disp = pos - fixup_pos - sizeof(int8_t);
|
| + ASSERT(0 <= disp && disp <= 127);
|
| + set_byte_at(fixup_pos, disp);
|
| + if (offset_to_next < 0) {
|
| + L->link_to(fixup_pos + offset_to_next, Label::kNear);
|
| + } else {
|
| + L->UnuseNear();
|
| + }
|
| + }
|
| L->bind_to(pos);
|
| }
|
|
|
|
|
| void Assembler::bind(Label* L) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = NULL;
|
| ASSERT(!L->is_bound()); // label can only be bound once
|
| bind_to(L, pc_offset());
|
| }
|
|
|
|
|
| -void Assembler::bind(NearLabel* L) {
|
| - ASSERT(!L->is_bound());
|
| - last_pc_ = NULL;
|
| - while (L->unresolved_branches_ > 0) {
|
| - int branch_pos = L->unresolved_positions_[L->unresolved_branches_ - 1];
|
| - int disp = pc_offset() - branch_pos;
|
| - ASSERT(is_int8(disp));
|
| - set_byte_at(branch_pos - sizeof(int8_t), disp);
|
| - L->unresolved_branches_--;
|
| - }
|
| - L->bind_to(pc_offset());
|
| -}
|
| -
|
| -
|
| void Assembler::call(Label* L) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (L->is_bound()) {
|
| const int long_size = 5;
|
| int offs = L->pos() - pc_offset();
|
| @@ -1572,7 +1338,6 @@
|
| void Assembler::call(byte* entry, RelocInfo::Mode rmode) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(!RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE8);
|
| emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
| @@ -1588,10 +1353,8 @@
|
| void Assembler::call(const Operand& adr) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(edx, adr);
|
| - ASSERT(pc_ - last_pc_ == CallSize(adr));
|
| }
|
|
|
|
|
| @@ -1605,16 +1368,14 @@
|
| unsigned ast_id) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE8);
|
| emit(reinterpret_cast<intptr_t>(code.location()), rmode, ast_id);
|
| }
|
|
|
|
|
| -void Assembler::jmp(Label* L) {
|
| +void Assembler::jmp(Label* L, Label::Distance distance) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (L->is_bound()) {
|
| const int short_size = 2;
|
| const int long_size = 5;
|
| @@ -1629,6 +1390,9 @@
|
| EMIT(0xE9);
|
| emit(offs - long_size);
|
| }
|
| + } else if (distance == Label::kNear) {
|
| + EMIT(0xEB);
|
| + emit_near_disp(L);
|
| } else {
|
| // 1110 1001 #32-bit disp.
|
| EMIT(0xE9);
|
| @@ -1639,7 +1403,6 @@
|
|
|
| void Assembler::jmp(byte* entry, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(!RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE9);
|
| emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
| @@ -1648,7 +1411,6 @@
|
|
|
| void Assembler::jmp(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(esp, adr);
|
| }
|
| @@ -1656,37 +1418,15 @@
|
|
|
| void Assembler::jmp(Handle<Code> code, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE9);
|
| emit(reinterpret_cast<intptr_t>(code.location()), rmode);
|
| }
|
|
|
|
|
| -void Assembler::jmp(NearLabel* L) {
|
| +void Assembler::j(Condition cc, Label* L, Label::Distance distance) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| - if (L->is_bound()) {
|
| - const int short_size = 2;
|
| - int offs = L->pos() - pc_offset();
|
| - ASSERT(offs <= 0);
|
| - ASSERT(is_int8(offs - short_size));
|
| - // 1110 1011 #8-bit disp.
|
| - EMIT(0xEB);
|
| - EMIT((offs - short_size) & 0xFF);
|
| - } else {
|
| - EMIT(0xEB);
|
| - EMIT(0x00); // The displacement will be resolved later.
|
| - L->link_to(pc_offset());
|
| - }
|
| -}
|
| -
|
| -
|
| -void Assembler::j(Condition cc, Label* L, Hint hint) {
|
| - EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(0 <= cc && cc < 16);
|
| - if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| if (L->is_bound()) {
|
| const int short_size = 2;
|
| const int long_size = 6;
|
| @@ -1702,6 +1442,9 @@
|
| EMIT(0x80 | cc);
|
| emit(offs - long_size);
|
| }
|
| + } else if (distance == Label::kNear) {
|
| + EMIT(0x70 | cc);
|
| + emit_near_disp(L);
|
| } else {
|
| // 0000 1111 1000 tttn #32-bit disp
|
| // Note: could eliminate cond. jumps to this jump if condition
|
| @@ -1713,11 +1456,9 @@
|
| }
|
|
|
|
|
| -void Assembler::j(Condition cc, byte* entry, RelocInfo::Mode rmode, Hint hint) {
|
| +void Assembler::j(Condition cc, byte* entry, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT((0 <= cc) && (cc < 16));
|
| - if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| // 0000 1111 1000 tttn #32-bit disp.
|
| EMIT(0x0F);
|
| EMIT(0x80 | cc);
|
| @@ -1725,10 +1466,8 @@
|
| }
|
|
|
|
|
| -void Assembler::j(Condition cc, Handle<Code> code, Hint hint) {
|
| +void Assembler::j(Condition cc, Handle<Code> code) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| - if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| // 0000 1111 1000 tttn #32-bit disp
|
| EMIT(0x0F);
|
| EMIT(0x80 | cc);
|
| @@ -1736,46 +1475,22 @@
|
| }
|
|
|
|
|
| -void Assembler::j(Condition cc, NearLabel* L, Hint hint) {
|
| - EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| - ASSERT(0 <= cc && cc < 16);
|
| - if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| - if (L->is_bound()) {
|
| - const int short_size = 2;
|
| - int offs = L->pos() - pc_offset();
|
| - ASSERT(offs <= 0);
|
| - ASSERT(is_int8(offs - short_size));
|
| - // 0111 tttn #8-bit disp
|
| - EMIT(0x70 | cc);
|
| - EMIT((offs - short_size) & 0xFF);
|
| - } else {
|
| - EMIT(0x70 | cc);
|
| - EMIT(0x00); // The displacement will be resolved later.
|
| - L->link_to(pc_offset());
|
| - }
|
| -}
|
| -
|
| -
|
| // FPU instructions.
|
|
|
| void Assembler::fld(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fstp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xD8, i);
|
| }
|
|
|
|
|
| void Assembler::fld1() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE8);
|
| }
|
| @@ -1783,7 +1498,6 @@
|
|
|
| void Assembler::fldpi() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xEB);
|
| }
|
| @@ -1791,7 +1505,6 @@
|
|
|
| void Assembler::fldz() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xEE);
|
| }
|
| @@ -1799,7 +1512,6 @@
|
|
|
| void Assembler::fldln2() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xED);
|
| }
|
| @@ -1807,7 +1519,6 @@
|
|
|
| void Assembler::fld_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1815,7 +1526,6 @@
|
|
|
| void Assembler::fld_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1823,7 +1533,6 @@
|
|
|
| void Assembler::fstp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1831,7 +1540,6 @@
|
|
|
| void Assembler::fstp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1839,7 +1547,6 @@
|
|
|
| void Assembler::fst_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(edx, adr);
|
| }
|
| @@ -1847,7 +1554,6 @@
|
|
|
| void Assembler::fild_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1855,7 +1561,6 @@
|
|
|
| void Assembler::fild_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| emit_operand(ebp, adr);
|
| }
|
| @@ -1863,7 +1568,6 @@
|
|
|
| void Assembler::fistp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1872,7 +1576,6 @@
|
| void Assembler::fisttp_s(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(ecx, adr);
|
| }
|
| @@ -1881,7 +1584,6 @@
|
| void Assembler::fisttp_d(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(ecx, adr);
|
| }
|
| @@ -1889,7 +1591,6 @@
|
|
|
| void Assembler::fist_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(edx, adr);
|
| }
|
| @@ -1897,7 +1598,6 @@
|
|
|
| void Assembler::fistp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| emit_operand(edi, adr);
|
| }
|
| @@ -1905,7 +1605,6 @@
|
|
|
| void Assembler::fabs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE1);
|
| }
|
| @@ -1913,7 +1612,6 @@
|
|
|
| void Assembler::fchs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE0);
|
| }
|
| @@ -1921,7 +1619,6 @@
|
|
|
| void Assembler::fcos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFF);
|
| }
|
| @@ -1929,7 +1626,6 @@
|
|
|
| void Assembler::fsin() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFE);
|
| }
|
| @@ -1937,7 +1633,6 @@
|
|
|
| void Assembler::fyl2x() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF1);
|
| }
|
| @@ -1945,21 +1640,18 @@
|
|
|
| void Assembler::fadd(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsub(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fisub_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDA);
|
| emit_operand(esp, adr);
|
| }
|
| @@ -1967,56 +1659,48 @@
|
|
|
| void Assembler::fmul(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdiv(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::faddp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsubp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fsubrp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE0, i);
|
| }
|
|
|
|
|
| void Assembler::fmulp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdivp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::fprem() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF8);
|
| }
|
| @@ -2024,7 +1708,6 @@
|
|
|
| void Assembler::fprem1() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF5);
|
| }
|
| @@ -2032,14 +1715,12 @@
|
|
|
| void Assembler::fxch(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fincstp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF7);
|
| }
|
| @@ -2047,14 +1728,12 @@
|
|
|
| void Assembler::ffree(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::ftst() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE4);
|
| }
|
| @@ -2062,14 +1741,12 @@
|
|
|
| void Assembler::fucomp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fucompp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDA);
|
| EMIT(0xE9);
|
| }
|
| @@ -2077,7 +1754,6 @@
|
|
|
| void Assembler::fucomi(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| EMIT(0xE8 + i);
|
| }
|
| @@ -2085,7 +1761,6 @@
|
|
|
| void Assembler::fucomip() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| EMIT(0xE9);
|
| }
|
| @@ -2093,7 +1768,6 @@
|
|
|
| void Assembler::fcompp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDE);
|
| EMIT(0xD9);
|
| }
|
| @@ -2101,7 +1775,6 @@
|
|
|
| void Assembler::fnstsw_ax() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| EMIT(0xE0);
|
| }
|
| @@ -2109,14 +1782,12 @@
|
|
|
| void Assembler::fwait() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9B);
|
| }
|
|
|
|
|
| void Assembler::frndint() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFC);
|
| }
|
| @@ -2124,7 +1795,6 @@
|
|
|
| void Assembler::fnclex() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| EMIT(0xE2);
|
| }
|
| @@ -2132,7 +1802,6 @@
|
|
|
| void Assembler::sahf() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9E);
|
| }
|
|
|
| @@ -2140,7 +1809,6 @@
|
| void Assembler::setcc(Condition cc, Register reg) {
|
| ASSERT(reg.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x90 | cc);
|
| EMIT(0xC0 | reg.code());
|
| @@ -2150,7 +1818,6 @@
|
| void Assembler::cvttss2si(Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x2C);
|
| @@ -2161,7 +1828,6 @@
|
| void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x2C);
|
| @@ -2172,7 +1838,6 @@
|
| void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x2A);
|
| @@ -2183,7 +1848,6 @@
|
| void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x5A);
|
| @@ -2194,7 +1858,6 @@
|
| void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5A);
|
| @@ -2205,7 +1868,6 @@
|
| void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x58);
|
| @@ -2216,7 +1878,6 @@
|
| void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x59);
|
| @@ -2227,7 +1888,6 @@
|
| void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5C);
|
| @@ -2238,7 +1898,6 @@
|
| void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5E);
|
| @@ -2249,7 +1908,6 @@
|
| void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x57);
|
| @@ -2259,7 +1917,6 @@
|
|
|
| void Assembler::xorps(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x57);
|
| emit_sse_operand(dst, src);
|
| @@ -2268,7 +1925,6 @@
|
|
|
| void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x51);
|
| @@ -2278,7 +1934,6 @@
|
|
|
| void Assembler::andpd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x54);
|
| @@ -2289,7 +1944,6 @@
|
| void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x2E);
|
| @@ -2300,7 +1954,6 @@
|
| void Assembler::movmskpd(Register dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x50);
|
| @@ -2311,7 +1964,6 @@
|
| void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0xC2);
|
| @@ -2323,7 +1975,6 @@
|
| void Assembler::movaps(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x28);
|
| emit_sse_operand(dst, src);
|
| @@ -2333,7 +1984,6 @@
|
| void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x7F);
|
| @@ -2344,7 +1994,6 @@
|
| void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x6F);
|
| @@ -2355,7 +2004,6 @@
|
| void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x7F);
|
| @@ -2366,7 +2014,6 @@
|
| void Assembler::movdqu(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x6F);
|
| @@ -2377,7 +2024,6 @@
|
| void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x38);
|
| @@ -2389,7 +2035,6 @@
|
| void Assembler::movntdq(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xE7);
|
| @@ -2400,7 +2045,6 @@
|
| void Assembler::prefetch(const Operand& src, int level) {
|
| ASSERT(is_uint2(level));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x18);
|
| XMMRegister code = { level }; // Emit hint number in Reg position of RegR/M.
|
| @@ -2410,14 +2054,12 @@
|
|
|
| void Assembler::movdbl(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| movsd(dst, src);
|
| }
|
|
|
|
|
| void Assembler::movdbl(const Operand& dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| movsd(dst, src);
|
| }
|
|
|
| @@ -2425,7 +2067,6 @@
|
| void Assembler::movsd(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| EMIT(0x0F);
|
| EMIT(0x11); // store
|
| @@ -2436,7 +2077,6 @@
|
| void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| EMIT(0x0F);
|
| EMIT(0x10); // load
|
| @@ -2447,7 +2087,6 @@
|
| void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x10);
|
| @@ -2458,7 +2097,6 @@
|
| void Assembler::movss(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3); // float
|
| EMIT(0x0F);
|
| EMIT(0x11); // store
|
| @@ -2469,7 +2107,6 @@
|
| void Assembler::movss(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3); // float
|
| EMIT(0x0F);
|
| EMIT(0x10); // load
|
| @@ -2480,7 +2117,6 @@
|
| void Assembler::movss(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x10);
|
| @@ -2491,7 +2127,6 @@
|
| void Assembler::movd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x6E);
|
| @@ -2502,7 +2137,6 @@
|
| void Assembler::movd(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x7E);
|
| @@ -2513,7 +2147,6 @@
|
| void Assembler::pand(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xDB);
|
| @@ -2524,7 +2157,6 @@
|
| void Assembler::pxor(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xEF);
|
| @@ -2535,7 +2167,6 @@
|
| void Assembler::por(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xEB);
|
| @@ -2546,7 +2177,6 @@
|
| void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x38);
|
| @@ -2558,7 +2188,6 @@
|
| void Assembler::psllq(XMMRegister reg, int8_t shift) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x73);
|
| @@ -2570,7 +2199,6 @@
|
| void Assembler::psllq(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xF3);
|
| @@ -2581,7 +2209,6 @@
|
| void Assembler::psrlq(XMMRegister reg, int8_t shift) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x73);
|
| @@ -2593,7 +2220,6 @@
|
| void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xD3);
|
| @@ -2604,7 +2230,6 @@
|
| void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x70);
|
| @@ -2616,7 +2241,6 @@
|
| void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x3A);
|
| @@ -2629,7 +2253,6 @@
|
| void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x3A);
|
| @@ -2728,9 +2351,6 @@
|
| buffer_ = desc.buffer;
|
| buffer_size_ = desc.buffer_size;
|
| pc_ += pc_delta;
|
| - if (last_pc_ != NULL) {
|
| - last_pc_ += pc_delta;
|
| - }
|
| reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
|
| reloc_info_writer.last_pc() + pc_delta);
|
|
|
|
|