Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(5)

Side by Side Diff: src/mips/simulator-mips.h

Issue 7060010: Merge bleeding edge into the GC branch up to 7948. The asserts (Closed) Base URL: http://v8.googlecode.com/svn/branches/experimental/gc/
Patch Set: Created 9 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/mips/register-allocator-mips-inl.h ('k') | src/mips/simulator-mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution. 11 // with the distribution.
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after
43 // Running without a simulator on a native mips platform. 43 // Running without a simulator on a native mips platform.
44 44
45 namespace v8 { 45 namespace v8 {
46 namespace internal { 46 namespace internal {
47 47
48 // When running without a simulator we call the entry directly. 48 // When running without a simulator we call the entry directly.
49 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ 49 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
50 entry(p0, p1, p2, p3, p4) 50 entry(p0, p1, p2, p3, p4)
51 51
52 typedef int (*mips_regexp_matcher)(String*, int, const byte*, const byte*, 52 typedef int (*mips_regexp_matcher)(String*, int, const byte*, const byte*,
53 void*, int*, Address, int, Isolate*); 53 int*, Address, int, Isolate*);
54
54 55
55 // Call the generated regexp code directly. The code at the entry address 56 // Call the generated regexp code directly. The code at the entry address
56 // should act as a function matching the type arm_regexp_matcher. 57 // should act as a function matching the type arm_regexp_matcher.
57 // The fifth argument is a dummy that reserves the space used for 58 // The fifth argument is a dummy that reserves the space used for
58 // the return address added by the ExitFrame in native calls. 59 // the return address added by the ExitFrame in native calls.
59 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7) \ 60 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7) \
60 (FUNCTION_CAST<mips_regexp_matcher>(entry)( \ 61 (FUNCTION_CAST<mips_regexp_matcher>(entry)(p0, p1, p2, p3, p4, p5, p6, p7))
61 p0, p1, p2, p3, NULL, p4, p5, p6, p7))
62 62
63 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \ 63 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
64 reinterpret_cast<TryCatch*>(try_catch_address) 64 reinterpret_cast<TryCatch*>(try_catch_address)
65 65
66 // The stack limit beyond which we will throw stack overflow errors in 66 // The stack limit beyond which we will throw stack overflow errors in
67 // generated code. Because generated code on mips uses the C stack, we 67 // generated code. Because generated code on mips uses the C stack, we
68 // just use the C stack limit. 68 // just use the C stack limit.
69 class SimulatorStack : public v8::internal::AllStatic { 69 class SimulatorStack : public v8::internal::AllStatic {
70 public: 70 public:
71 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) { 71 static inline uintptr_t JsLimitFromCLimit(Isolate* isolate,
72 uintptr_t c_limit) {
72 return c_limit; 73 return c_limit;
73 } 74 }
74 75
75 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) { 76 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
76 return try_catch_address; 77 return try_catch_address;
77 } 78 }
78 79
79 static inline void UnregisterCTryCatch() { } 80 static inline void UnregisterCTryCatch() { }
80 }; 81 };
81 82
82 } } // namespace v8::internal 83 } } // namespace v8::internal
83 84
84 // Calculated the stack limit beyond which we will throw stack overflow errors. 85 // Calculated the stack limit beyond which we will throw stack overflow errors.
85 // This macro must be called from a C++ method. It relies on being able to take 86 // This macro must be called from a C++ method. It relies on being able to take
86 // the address of "this" to get a value on the current execution stack and then 87 // the address of "this" to get a value on the current execution stack and then
87 // calculates the stack limit based on that value. 88 // calculates the stack limit based on that value.
88 // NOTE: The check for overflow is not safe as there is no guarantee that the 89 // NOTE: The check for overflow is not safe as there is no guarantee that the
89 // running thread has its stack in all memory up to address 0x00000000. 90 // running thread has its stack in all memory up to address 0x00000000.
90 #define GENERATED_CODE_STACK_LIMIT(limit) \ 91 #define GENERATED_CODE_STACK_LIMIT(limit) \
91 (reinterpret_cast<uintptr_t>(this) >= limit ? \ 92 (reinterpret_cast<uintptr_t>(this) >= limit ? \
92 reinterpret_cast<uintptr_t>(this) - limit : 0) 93 reinterpret_cast<uintptr_t>(this) - limit : 0)
93 94
94 #else // !defined(USE_SIMULATOR) 95 #else // !defined(USE_SIMULATOR)
95 // Running with a simulator. 96 // Running with a simulator.
96 97
97 #include "hashmap.h" 98 #include "hashmap.h"
99 #include "assembler.h"
98 100
99 namespace v8 { 101 namespace v8 {
100 namespace internal { 102 namespace internal {
101 103
102 // ----------------------------------------------------------------------------- 104 // -----------------------------------------------------------------------------
103 // Utility functions 105 // Utility functions
104 106
105 class CachePage { 107 class CachePage {
106 public: 108 public:
107 static const int LINE_VALID = 0; 109 static const int LINE_VALID = 0;
(...skipping 36 matching lines...) Expand 10 before | Expand all | Expand 10 after
144 v0, v1, 146 v0, v1,
145 a0, a1, a2, a3, 147 a0, a1, a2, a3,
146 t0, t1, t2, t3, t4, t5, t6, t7, 148 t0, t1, t2, t3, t4, t5, t6, t7,
147 s0, s1, s2, s3, s4, s5, s6, s7, 149 s0, s1, s2, s3, s4, s5, s6, s7,
148 t8, t9, 150 t8, t9,
149 k0, k1, 151 k0, k1,
150 gp, 152 gp,
151 sp, 153 sp,
152 s8, 154 s8,
153 ra, 155 ra,
154 // LO, HI, and pc 156 // LO, HI, and pc.
155 LO, 157 LO,
156 HI, 158 HI,
157 pc, // pc must be the last register. 159 pc, // pc must be the last register.
158 kNumSimuRegisters, 160 kNumSimuRegisters,
159 // aliases 161 // aliases
160 fp = s8 162 fp = s8
161 }; 163 };
162 164
163 // Coprocessor registers. 165 // Coprocessor registers.
164 // Generated code will always use doubles. So we will only use even registers. 166 // Generated code will always use doubles. So we will only use even registers.
165 enum FPURegister { 167 enum FPURegister {
166 f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, 168 f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11,
167 f12, f13, f14, f15, // f12 and f14 are arguments FPURegisters 169 f12, f13, f14, f15, // f12 and f14 are arguments FPURegisters.
168 f16, f17, f18, f19, f20, f21, f22, f23, f24, f25, 170 f16, f17, f18, f19, f20, f21, f22, f23, f24, f25,
169 f26, f27, f28, f29, f30, f31, 171 f26, f27, f28, f29, f30, f31,
170 kNumFPURegisters 172 kNumFPURegisters
171 }; 173 };
172 174
173 Simulator(); 175 explicit Simulator(Isolate* isolate);
174 ~Simulator(); 176 ~Simulator();
175 177
176 // The currently executing Simulator instance. Potentially there can be one 178 // The currently executing Simulator instance. Potentially there can be one
177 // for each native thread. 179 // for each native thread.
178 static Simulator* current(v8::internal::Isolate* isolate); 180 static Simulator* current(v8::internal::Isolate* isolate);
179 181
180 // Accessors for register state. Reading the pc value adheres to the MIPS 182 // Accessors for register state. Reading the pc value adheres to the MIPS
181 // architecture specification and is off by a 8 from the currently executing 183 // architecture specification and is off by a 8 from the currently executing
182 // instruction. 184 // instruction.
183 void set_register(int reg, int32_t value); 185 void set_register(int reg, int32_t value);
184 int32_t get_register(int reg) const; 186 int32_t get_register(int reg) const;
185 // Same for FPURegisters 187 // Same for FPURegisters.
186 void set_fpu_register(int fpureg, int32_t value); 188 void set_fpu_register(int fpureg, int32_t value);
187 void set_fpu_register_float(int fpureg, float value); 189 void set_fpu_register_float(int fpureg, float value);
188 void set_fpu_register_double(int fpureg, double value); 190 void set_fpu_register_double(int fpureg, double value);
189 int32_t get_fpu_register(int fpureg) const; 191 int32_t get_fpu_register(int fpureg) const;
190 int64_t get_fpu_register_long(int fpureg) const; 192 int64_t get_fpu_register_long(int fpureg) const;
191 float get_fpu_register_float(int fpureg) const; 193 float get_fpu_register_float(int fpureg) const;
192 double get_fpu_register_double(int fpureg) const; 194 double get_fpu_register_double(int fpureg) const;
193 void set_fcsr_bit(uint32_t cc, bool value); 195 void set_fcsr_bit(uint32_t cc, bool value);
194 bool test_fcsr_bit(uint32_t cc); 196 bool test_fcsr_bit(uint32_t cc);
195 bool set_fcsr_round_error(double original, double rounded); 197 bool set_fcsr_round_error(double original, double rounded);
196 198
197 // Special case of set_register and get_register to access the raw PC value. 199 // Special case of set_register and get_register to access the raw PC value.
198 void set_pc(int32_t value); 200 void set_pc(int32_t value);
199 int32_t get_pc() const; 201 int32_t get_pc() const;
200 202
201 // Accessor to the internal simulator stack area. 203 // Accessor to the internal simulator stack area.
202 uintptr_t StackLimit() const; 204 uintptr_t StackLimit() const;
203 205
204 // Executes MIPS instructions until the PC reaches end_sim_pc. 206 // Executes MIPS instructions until the PC reaches end_sim_pc.
205 void Execute(); 207 void Execute();
206 208
207 // Call on program start. 209 // Call on program start.
208 static void Initialize(); 210 static void Initialize(Isolate* isolate);
209 211
210 // V8 generally calls into generated JS code with 5 parameters and into 212 // V8 generally calls into generated JS code with 5 parameters and into
211 // generated RegExp code with 7 parameters. This is a convenience function, 213 // generated RegExp code with 7 parameters. This is a convenience function,
212 // which sets up the simulator state and grabs the result on return. 214 // which sets up the simulator state and grabs the result on return.
213 int32_t Call(byte* entry, int argument_count, ...); 215 int32_t Call(byte* entry, int argument_count, ...);
214 216
215 // Push an address onto the JS stack. 217 // Push an address onto the JS stack.
216 uintptr_t PushAddress(uintptr_t address); 218 uintptr_t PushAddress(uintptr_t address);
217 219
218 // Pop an address from the JS stack. 220 // Pop an address from the JS stack.
(...skipping 78 matching lines...) Expand 10 before | Expand all | Expand 10 after
297 } 299 }
298 InstructionDecode(instr); 300 InstructionDecode(instr);
299 } 301 }
300 302
301 // ICache. 303 // ICache.
302 static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr); 304 static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr);
303 static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start, 305 static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
304 int size); 306 int size);
305 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); 307 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page);
306 308
307
308 enum Exception { 309 enum Exception {
309 none, 310 none,
310 kIntegerOverflow, 311 kIntegerOverflow,
311 kIntegerUnderflow, 312 kIntegerUnderflow,
312 kDivideByZero, 313 kDivideByZero,
313 kNumExceptions 314 kNumExceptions
314 }; 315 };
315 int16_t exceptions[kNumExceptions]; 316 int16_t exceptions[kNumExceptions];
316 317
317 // Exceptions. 318 // Exceptions.
318 void SignalExceptions(); 319 void SignalExceptions();
319 320
320 // Runtime call support. 321 // Runtime call support.
321 static void* RedirectExternalReference(void* external_function, 322 static void* RedirectExternalReference(void* external_function,
322 ExternalReference::Type type); 323 ExternalReference::Type type);
323 324
324 // Used for real time calls that takes two double values as arguments and 325 // Used for real time calls that takes two double values as arguments and
325 // returns a double. 326 // returns a double.
326 void SetFpResult(double result); 327 void SetFpResult(double result);
327 328
328 // Architecture state. 329 // Architecture state.
329 // Registers. 330 // Registers.
330 int32_t registers_[kNumSimuRegisters]; 331 int32_t registers_[kNumSimuRegisters];
331 // Coprocessor Registers. 332 // Coprocessor Registers.
332 int32_t FPUregisters_[kNumFPURegisters]; 333 int32_t FPUregisters_[kNumFPURegisters];
333 // FPU control register. 334 // FPU control register.
334 uint32_t FCSR_; 335 uint32_t FCSR_;
335 336
336 // Simulator support. 337 // Simulator support.
338 // Allocate 1MB for stack.
339 static const size_t stack_size_ = 1 * 1024*1024;
337 char* stack_; 340 char* stack_;
338 size_t stack_size_;
339 bool pc_modified_; 341 bool pc_modified_;
340 int icount_; 342 int icount_;
341 int break_count_; 343 int break_count_;
342 344
343 // Icache simulation 345 // Icache simulation.
344 v8::internal::HashMap* i_cache_; 346 v8::internal::HashMap* i_cache_;
345 347
348 v8::internal::Isolate* isolate_;
349
346 // Registered breakpoints. 350 // Registered breakpoints.
347 Instruction* break_pc_; 351 Instruction* break_pc_;
348 Instr break_instr_; 352 Instr break_instr_;
349
350 v8::internal::Isolate* isolate_;
351 }; 353 };
352 354
353 355
354 // When running with the simulator transition into simulated execution at this 356 // When running with the simulator transition into simulated execution at this
355 // point. 357 // point.
356 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ 358 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
357 reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \ 359 reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \
358 FUNCTION_ADDR(entry), 5, p0, p1, p2, p3, p4)) 360 FUNCTION_ADDR(entry), 5, p0, p1, p2, p3, p4))
359 361
360 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7) \ 362 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7) \
361 Simulator::current(Isolate::Current())->Call( \ 363 Simulator::current(Isolate::Current())->Call( \
362 entry, 9, p0, p1, p2, p3, NULL, p4, p5, p6, p7) 364 entry, 8, p0, p1, p2, p3, p4, p5, p6, p7)
363 365
364 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \ 366 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
365 try_catch_address == NULL ? \ 367 try_catch_address == NULL ? \
366 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address)) 368 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
367 369
368 370
369 // The simulator has its own stack. Thus it has a different stack limit from 371 // The simulator has its own stack. Thus it has a different stack limit from
370 // the C-based native code. Setting the c_limit to indicate a very small 372 // the C-based native code. Setting the c_limit to indicate a very small
371 // stack cause stack overflow errors, since the simulator ignores the input. 373 // stack cause stack overflow errors, since the simulator ignores the input.
372 // This is unlikely to be an issue in practice, though it might cause testing 374 // This is unlikely to be an issue in practice, though it might cause testing
373 // trouble down the line. 375 // trouble down the line.
374 class SimulatorStack : public v8::internal::AllStatic { 376 class SimulatorStack : public v8::internal::AllStatic {
375 public: 377 public:
376 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) { 378 static inline uintptr_t JsLimitFromCLimit(Isolate* isolate,
377 return Simulator::current(Isolate::Current())->StackLimit(); 379 uintptr_t c_limit) {
380 return Simulator::current(isolate)->StackLimit();
378 } 381 }
379 382
380 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) { 383 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
381 Simulator* sim = Simulator::current(Isolate::Current()); 384 Simulator* sim = Simulator::current(Isolate::Current());
382 return sim->PushAddress(try_catch_address); 385 return sim->PushAddress(try_catch_address);
383 } 386 }
384 387
385 static inline void UnregisterCTryCatch() { 388 static inline void UnregisterCTryCatch() {
386 Simulator::current(Isolate::Current())->PopAddress(); 389 Simulator::current(Isolate::Current())->PopAddress();
387 } 390 }
388 }; 391 };
389 392
390 } } // namespace v8::internal 393 } } // namespace v8::internal
391 394
392 #endif // !defined(USE_SIMULATOR) 395 #endif // !defined(USE_SIMULATOR)
393 #endif // V8_MIPS_SIMULATOR_MIPS_H_ 396 #endif // V8_MIPS_SIMULATOR_MIPS_H_
394 397
OLDNEW
« no previous file with comments | « src/mips/register-allocator-mips-inl.h ('k') | src/mips/simulator-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698