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Side by Side Diff: src/ia32/assembler-ia32.cc

Issue 7060010: Merge bleeding edge into the GC branch up to 7948. The asserts (Closed) Base URL: http://v8.googlecode.com/svn/branches/experimental/gc/
Patch Set: Created 9 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 336 matching lines...) Expand 10 before | Expand all | Expand 10 after
347 if (own_buffer_) { 347 if (own_buffer_) {
348 memset(buffer_, 0xCC, buffer_size); // int3 348 memset(buffer_, 0xCC, buffer_size); // int3
349 } 349 }
350 #endif 350 #endif
351 351
352 // Setup buffer pointers. 352 // Setup buffer pointers.
353 ASSERT(buffer_ != NULL); 353 ASSERT(buffer_ != NULL);
354 pc_ = buffer_; 354 pc_ = buffer_;
355 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_); 355 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
356 356
357 last_pc_ = NULL;
358 #ifdef GENERATED_CODE_COVERAGE 357 #ifdef GENERATED_CODE_COVERAGE
359 InitCoverageLog(); 358 InitCoverageLog();
360 #endif 359 #endif
361 } 360 }
362 361
363 362
364 Assembler::~Assembler() { 363 Assembler::~Assembler() {
365 if (own_buffer_) { 364 if (own_buffer_) {
366 if (isolate()->assembler_spare_buffer() == NULL && 365 if (isolate()->assembler_spare_buffer() == NULL &&
367 buffer_size_ == kMinimalBufferSize) { 366 buffer_size_ == kMinimalBufferSize) {
(...skipping 27 matching lines...) Expand all
395 394
396 395
397 void Assembler::CodeTargetAlign() { 396 void Assembler::CodeTargetAlign() {
398 Align(16); // Preferred alignment of jump targets on ia32. 397 Align(16); // Preferred alignment of jump targets on ia32.
399 } 398 }
400 399
401 400
402 void Assembler::cpuid() { 401 void Assembler::cpuid() {
403 ASSERT(CpuFeatures::IsEnabled(CPUID)); 402 ASSERT(CpuFeatures::IsEnabled(CPUID));
404 EnsureSpace ensure_space(this); 403 EnsureSpace ensure_space(this);
405 last_pc_ = pc_;
406 EMIT(0x0F); 404 EMIT(0x0F);
407 EMIT(0xA2); 405 EMIT(0xA2);
408 } 406 }
409 407
410 408
411 void Assembler::pushad() { 409 void Assembler::pushad() {
412 EnsureSpace ensure_space(this); 410 EnsureSpace ensure_space(this);
413 last_pc_ = pc_;
414 EMIT(0x60); 411 EMIT(0x60);
415 } 412 }
416 413
417 414
418 void Assembler::popad() { 415 void Assembler::popad() {
419 EnsureSpace ensure_space(this); 416 EnsureSpace ensure_space(this);
420 last_pc_ = pc_;
421 EMIT(0x61); 417 EMIT(0x61);
422 } 418 }
423 419
424 420
425 void Assembler::pushfd() { 421 void Assembler::pushfd() {
426 EnsureSpace ensure_space(this); 422 EnsureSpace ensure_space(this);
427 last_pc_ = pc_;
428 EMIT(0x9C); 423 EMIT(0x9C);
429 } 424 }
430 425
431 426
432 void Assembler::popfd() { 427 void Assembler::popfd() {
433 EnsureSpace ensure_space(this); 428 EnsureSpace ensure_space(this);
434 last_pc_ = pc_;
435 EMIT(0x9D); 429 EMIT(0x9D);
436 } 430 }
437 431
438 432
439 void Assembler::push(const Immediate& x) { 433 void Assembler::push(const Immediate& x) {
440 EnsureSpace ensure_space(this); 434 EnsureSpace ensure_space(this);
441 last_pc_ = pc_;
442 if (x.is_int8()) { 435 if (x.is_int8()) {
443 EMIT(0x6a); 436 EMIT(0x6a);
444 EMIT(x.x_); 437 EMIT(x.x_);
445 } else { 438 } else {
446 EMIT(0x68); 439 EMIT(0x68);
447 emit(x); 440 emit(x);
448 } 441 }
449 } 442 }
450 443
451 444
452 void Assembler::push_imm32(int32_t imm32) { 445 void Assembler::push_imm32(int32_t imm32) {
453 EnsureSpace ensure_space(this); 446 EnsureSpace ensure_space(this);
454 EMIT(0x68); 447 EMIT(0x68);
455 emit(imm32); 448 emit(imm32);
456 } 449 }
457 450
458 451
459 void Assembler::push(Register src) { 452 void Assembler::push(Register src) {
460 EnsureSpace ensure_space(this); 453 EnsureSpace ensure_space(this);
461 last_pc_ = pc_;
462 EMIT(0x50 | src.code()); 454 EMIT(0x50 | src.code());
463 } 455 }
464 456
465 457
466 void Assembler::push(const Operand& src) { 458 void Assembler::push(const Operand& src) {
467 EnsureSpace ensure_space(this); 459 EnsureSpace ensure_space(this);
468 last_pc_ = pc_;
469 EMIT(0xFF); 460 EMIT(0xFF);
470 emit_operand(esi, src); 461 emit_operand(esi, src);
471 } 462 }
472 463
473 464
474 void Assembler::pop(Register dst) { 465 void Assembler::pop(Register dst) {
475 ASSERT(reloc_info_writer.last_pc() != NULL); 466 ASSERT(reloc_info_writer.last_pc() != NULL);
476 if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
477 // (last_pc_ != NULL) is rolled into the above check.
478 // If a last_pc_ is set, we need to make sure that there has not been any
479 // relocation information generated between the last instruction and this
480 // pop instruction.
481 byte instr = last_pc_[0];
482 if ((instr & ~0x7) == 0x50) {
483 int push_reg_code = instr & 0x7;
484 if (push_reg_code == dst.code()) {
485 pc_ = last_pc_;
486 if (FLAG_print_peephole_optimization) {
487 PrintF("%d push/pop (same reg) eliminated\n", pc_offset());
488 }
489 } else {
490 // Convert 'push src; pop dst' to 'mov dst, src'.
491 last_pc_[0] = 0x8b;
492 Register src = { push_reg_code };
493 EnsureSpace ensure_space(this);
494 emit_operand(dst, Operand(src));
495 if (FLAG_print_peephole_optimization) {
496 PrintF("%d push/pop (reg->reg) eliminated\n", pc_offset());
497 }
498 }
499 last_pc_ = NULL;
500 return;
501 } else if (instr == 0xff) { // push of an operand, convert to a move
502 byte op1 = last_pc_[1];
503 // Check if the operation is really a push.
504 if ((op1 & 0x38) == (6 << 3)) {
505 op1 = (op1 & ~0x38) | static_cast<byte>(dst.code() << 3);
506 last_pc_[0] = 0x8b;
507 last_pc_[1] = op1;
508 last_pc_ = NULL;
509 if (FLAG_print_peephole_optimization) {
510 PrintF("%d push/pop (op->reg) eliminated\n", pc_offset());
511 }
512 return;
513 }
514 } else if ((instr == 0x89) &&
515 (last_pc_[1] == 0x04) &&
516 (last_pc_[2] == 0x24)) {
517 // 0x71283c 396 890424 mov [esp],eax
518 // 0x71283f 399 58 pop eax
519 if (dst.is(eax)) {
520 // change to
521 // 0x710fac 216 83c404 add esp,0x4
522 last_pc_[0] = 0x83;
523 last_pc_[1] = 0xc4;
524 last_pc_[2] = 0x04;
525 last_pc_ = NULL;
526 if (FLAG_print_peephole_optimization) {
527 PrintF("%d push/pop (mov-pop) eliminated\n", pc_offset());
528 }
529 return;
530 }
531 } else if (instr == 0x6a && dst.is(eax)) { // push of immediate 8 bit
532 byte imm8 = last_pc_[1];
533 if (imm8 == 0) {
534 // 6a00 push 0x0
535 // 58 pop eax
536 last_pc_[0] = 0x31;
537 last_pc_[1] = 0xc0;
538 // change to
539 // 31c0 xor eax,eax
540 last_pc_ = NULL;
541 if (FLAG_print_peephole_optimization) {
542 PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
543 }
544 return;
545 } else {
546 // 6a00 push 0xXX
547 // 58 pop eax
548 last_pc_[0] = 0xb8;
549 EnsureSpace ensure_space(this);
550 if ((imm8 & 0x80) != 0) {
551 EMIT(0xff);
552 EMIT(0xff);
553 EMIT(0xff);
554 // change to
555 // b8XXffffff mov eax,0xffffffXX
556 } else {
557 EMIT(0x00);
558 EMIT(0x00);
559 EMIT(0x00);
560 // change to
561 // b8XX000000 mov eax,0x000000XX
562 }
563 last_pc_ = NULL;
564 if (FLAG_print_peephole_optimization) {
565 PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
566 }
567 return;
568 }
569 } else if (instr == 0x68 && dst.is(eax)) { // push of immediate 32 bit
570 // 68XXXXXXXX push 0xXXXXXXXX
571 // 58 pop eax
572 last_pc_[0] = 0xb8;
573 last_pc_ = NULL;
574 // change to
575 // b8XXXXXXXX mov eax,0xXXXXXXXX
576 if (FLAG_print_peephole_optimization) {
577 PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
578 }
579 return;
580 }
581
582 // Other potential patterns for peephole:
583 // 0x712716 102 890424 mov [esp], eax
584 // 0x712719 105 8b1424 mov edx, [esp]
585 }
586 EnsureSpace ensure_space(this); 467 EnsureSpace ensure_space(this);
587 last_pc_ = pc_;
588 EMIT(0x58 | dst.code()); 468 EMIT(0x58 | dst.code());
589 } 469 }
590 470
591 471
592 void Assembler::pop(const Operand& dst) { 472 void Assembler::pop(const Operand& dst) {
593 EnsureSpace ensure_space(this); 473 EnsureSpace ensure_space(this);
594 last_pc_ = pc_;
595 EMIT(0x8F); 474 EMIT(0x8F);
596 emit_operand(eax, dst); 475 emit_operand(eax, dst);
597 } 476 }
598 477
599 478
600 void Assembler::enter(const Immediate& size) { 479 void Assembler::enter(const Immediate& size) {
601 EnsureSpace ensure_space(this); 480 EnsureSpace ensure_space(this);
602 last_pc_ = pc_;
603 EMIT(0xC8); 481 EMIT(0xC8);
604 emit_w(size); 482 emit_w(size);
605 EMIT(0); 483 EMIT(0);
606 } 484 }
607 485
608 486
609 void Assembler::leave() { 487 void Assembler::leave() {
610 EnsureSpace ensure_space(this); 488 EnsureSpace ensure_space(this);
611 last_pc_ = pc_;
612 EMIT(0xC9); 489 EMIT(0xC9);
613 } 490 }
614 491
615 492
616 void Assembler::mov_b(Register dst, const Operand& src) { 493 void Assembler::mov_b(Register dst, const Operand& src) {
617 ASSERT(dst.code() < 4); 494 ASSERT(dst.code() < 4);
618 EnsureSpace ensure_space(this); 495 EnsureSpace ensure_space(this);
619 last_pc_ = pc_;
620 EMIT(0x8A); 496 EMIT(0x8A);
621 emit_operand(dst, src); 497 emit_operand(dst, src);
622 } 498 }
623 499
624 500
625 void Assembler::mov_b(const Operand& dst, int8_t imm8) { 501 void Assembler::mov_b(const Operand& dst, int8_t imm8) {
626 EnsureSpace ensure_space(this); 502 EnsureSpace ensure_space(this);
627 last_pc_ = pc_;
628 EMIT(0xC6); 503 EMIT(0xC6);
629 emit_operand(eax, dst); 504 emit_operand(eax, dst);
630 EMIT(imm8); 505 EMIT(imm8);
631 } 506 }
632 507
633 508
634 void Assembler::mov_b(const Operand& dst, Register src) { 509 void Assembler::mov_b(const Operand& dst, Register src) {
635 ASSERT(src.code() < 4); 510 ASSERT(src.code() < 4);
636 EnsureSpace ensure_space(this); 511 EnsureSpace ensure_space(this);
637 last_pc_ = pc_;
638 EMIT(0x88); 512 EMIT(0x88);
639 emit_operand(src, dst); 513 emit_operand(src, dst);
640 } 514 }
641 515
642 516
643 void Assembler::mov_w(Register dst, const Operand& src) { 517 void Assembler::mov_w(Register dst, const Operand& src) {
644 EnsureSpace ensure_space(this); 518 EnsureSpace ensure_space(this);
645 last_pc_ = pc_;
646 EMIT(0x66); 519 EMIT(0x66);
647 EMIT(0x8B); 520 EMIT(0x8B);
648 emit_operand(dst, src); 521 emit_operand(dst, src);
649 } 522 }
650 523
651 524
652 void Assembler::mov_w(const Operand& dst, Register src) { 525 void Assembler::mov_w(const Operand& dst, Register src) {
653 EnsureSpace ensure_space(this); 526 EnsureSpace ensure_space(this);
654 last_pc_ = pc_;
655 EMIT(0x66); 527 EMIT(0x66);
656 EMIT(0x89); 528 EMIT(0x89);
657 emit_operand(src, dst); 529 emit_operand(src, dst);
658 } 530 }
659 531
660 532
661 void Assembler::mov(Register dst, int32_t imm32) { 533 void Assembler::mov(Register dst, int32_t imm32) {
662 EnsureSpace ensure_space(this); 534 EnsureSpace ensure_space(this);
663 last_pc_ = pc_;
664 EMIT(0xB8 | dst.code()); 535 EMIT(0xB8 | dst.code());
665 emit(imm32); 536 emit(imm32);
666 } 537 }
667 538
668 539
669 void Assembler::mov(Register dst, const Immediate& x) { 540 void Assembler::mov(Register dst, const Immediate& x) {
670 EnsureSpace ensure_space(this); 541 EnsureSpace ensure_space(this);
671 last_pc_ = pc_;
672 EMIT(0xB8 | dst.code()); 542 EMIT(0xB8 | dst.code());
673 emit(x); 543 emit(x);
674 } 544 }
675 545
676 546
677 void Assembler::mov(Register dst, Handle<Object> handle) { 547 void Assembler::mov(Register dst, Handle<Object> handle) {
678 EnsureSpace ensure_space(this); 548 EnsureSpace ensure_space(this);
679 last_pc_ = pc_;
680 EMIT(0xB8 | dst.code()); 549 EMIT(0xB8 | dst.code());
681 emit(handle); 550 emit(handle);
682 } 551 }
683 552
684 553
685 void Assembler::mov(Register dst, const Operand& src) { 554 void Assembler::mov(Register dst, const Operand& src) {
686 EnsureSpace ensure_space(this); 555 EnsureSpace ensure_space(this);
687 last_pc_ = pc_;
688 EMIT(0x8B); 556 EMIT(0x8B);
689 emit_operand(dst, src); 557 emit_operand(dst, src);
690 } 558 }
691 559
692 560
693 void Assembler::mov(Register dst, Register src) { 561 void Assembler::mov(Register dst, Register src) {
694 EnsureSpace ensure_space(this); 562 EnsureSpace ensure_space(this);
695 last_pc_ = pc_;
696 EMIT(0x89); 563 EMIT(0x89);
697 EMIT(0xC0 | src.code() << 3 | dst.code()); 564 EMIT(0xC0 | src.code() << 3 | dst.code());
698 } 565 }
699 566
700 567
701 void Assembler::mov(const Operand& dst, const Immediate& x) { 568 void Assembler::mov(const Operand& dst, const Immediate& x) {
702 EnsureSpace ensure_space(this); 569 EnsureSpace ensure_space(this);
703 last_pc_ = pc_;
704 EMIT(0xC7); 570 EMIT(0xC7);
705 emit_operand(eax, dst); 571 emit_operand(eax, dst);
706 emit(x); 572 emit(x);
707 } 573 }
708 574
709 575
710 void Assembler::mov(const Operand& dst, Handle<Object> handle) { 576 void Assembler::mov(const Operand& dst, Handle<Object> handle) {
711 EnsureSpace ensure_space(this); 577 EnsureSpace ensure_space(this);
712 last_pc_ = pc_;
713 EMIT(0xC7); 578 EMIT(0xC7);
714 emit_operand(eax, dst); 579 emit_operand(eax, dst);
715 emit(handle); 580 emit(handle);
716 } 581 }
717 582
718 583
719 void Assembler::mov(const Operand& dst, Register src) { 584 void Assembler::mov(const Operand& dst, Register src) {
720 EnsureSpace ensure_space(this); 585 EnsureSpace ensure_space(this);
721 last_pc_ = pc_;
722 EMIT(0x89); 586 EMIT(0x89);
723 emit_operand(src, dst); 587 emit_operand(src, dst);
724 } 588 }
725 589
726 590
727 void Assembler::movsx_b(Register dst, const Operand& src) { 591 void Assembler::movsx_b(Register dst, const Operand& src) {
728 EnsureSpace ensure_space(this); 592 EnsureSpace ensure_space(this);
729 last_pc_ = pc_;
730 EMIT(0x0F); 593 EMIT(0x0F);
731 EMIT(0xBE); 594 EMIT(0xBE);
732 emit_operand(dst, src); 595 emit_operand(dst, src);
733 } 596 }
734 597
735 598
736 void Assembler::movsx_w(Register dst, const Operand& src) { 599 void Assembler::movsx_w(Register dst, const Operand& src) {
737 EnsureSpace ensure_space(this); 600 EnsureSpace ensure_space(this);
738 last_pc_ = pc_;
739 EMIT(0x0F); 601 EMIT(0x0F);
740 EMIT(0xBF); 602 EMIT(0xBF);
741 emit_operand(dst, src); 603 emit_operand(dst, src);
742 } 604 }
743 605
744 606
745 void Assembler::movzx_b(Register dst, const Operand& src) { 607 void Assembler::movzx_b(Register dst, const Operand& src) {
746 EnsureSpace ensure_space(this); 608 EnsureSpace ensure_space(this);
747 last_pc_ = pc_;
748 EMIT(0x0F); 609 EMIT(0x0F);
749 EMIT(0xB6); 610 EMIT(0xB6);
750 emit_operand(dst, src); 611 emit_operand(dst, src);
751 } 612 }
752 613
753 614
754 void Assembler::movzx_w(Register dst, const Operand& src) { 615 void Assembler::movzx_w(Register dst, const Operand& src) {
755 EnsureSpace ensure_space(this); 616 EnsureSpace ensure_space(this);
756 last_pc_ = pc_;
757 EMIT(0x0F); 617 EMIT(0x0F);
758 EMIT(0xB7); 618 EMIT(0xB7);
759 emit_operand(dst, src); 619 emit_operand(dst, src);
760 } 620 }
761 621
762 622
763 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { 623 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
764 ASSERT(CpuFeatures::IsEnabled(CMOV)); 624 ASSERT(CpuFeatures::IsEnabled(CMOV));
765 EnsureSpace ensure_space(this); 625 EnsureSpace ensure_space(this);
766 last_pc_ = pc_;
767 UNIMPLEMENTED(); 626 UNIMPLEMENTED();
768 USE(cc); 627 USE(cc);
769 USE(dst); 628 USE(dst);
770 USE(imm32); 629 USE(imm32);
771 } 630 }
772 631
773 632
774 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { 633 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
775 ASSERT(CpuFeatures::IsEnabled(CMOV)); 634 ASSERT(CpuFeatures::IsEnabled(CMOV));
776 EnsureSpace ensure_space(this); 635 EnsureSpace ensure_space(this);
777 last_pc_ = pc_;
778 UNIMPLEMENTED(); 636 UNIMPLEMENTED();
779 USE(cc); 637 USE(cc);
780 USE(dst); 638 USE(dst);
781 USE(handle); 639 USE(handle);
782 } 640 }
783 641
784 642
785 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { 643 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
786 ASSERT(CpuFeatures::IsEnabled(CMOV)); 644 ASSERT(CpuFeatures::IsEnabled(CMOV));
787 EnsureSpace ensure_space(this); 645 EnsureSpace ensure_space(this);
788 last_pc_ = pc_;
789 // Opcode: 0f 40 + cc /r. 646 // Opcode: 0f 40 + cc /r.
790 EMIT(0x0F); 647 EMIT(0x0F);
791 EMIT(0x40 + cc); 648 EMIT(0x40 + cc);
792 emit_operand(dst, src); 649 emit_operand(dst, src);
793 } 650 }
794 651
795 652
796 void Assembler::cld() { 653 void Assembler::cld() {
797 EnsureSpace ensure_space(this); 654 EnsureSpace ensure_space(this);
798 last_pc_ = pc_;
799 EMIT(0xFC); 655 EMIT(0xFC);
800 } 656 }
801 657
802 658
803 void Assembler::rep_movs() { 659 void Assembler::rep_movs() {
804 EnsureSpace ensure_space(this); 660 EnsureSpace ensure_space(this);
805 last_pc_ = pc_;
806 EMIT(0xF3); 661 EMIT(0xF3);
807 EMIT(0xA5); 662 EMIT(0xA5);
808 } 663 }
809 664
810 665
811 void Assembler::rep_stos() { 666 void Assembler::rep_stos() {
812 EnsureSpace ensure_space(this); 667 EnsureSpace ensure_space(this);
813 last_pc_ = pc_;
814 EMIT(0xF3); 668 EMIT(0xF3);
815 EMIT(0xAB); 669 EMIT(0xAB);
816 } 670 }
817 671
818 672
819 void Assembler::stos() { 673 void Assembler::stos() {
820 EnsureSpace ensure_space(this); 674 EnsureSpace ensure_space(this);
821 last_pc_ = pc_;
822 EMIT(0xAB); 675 EMIT(0xAB);
823 } 676 }
824 677
825 678
826 void Assembler::xchg(Register dst, Register src) { 679 void Assembler::xchg(Register dst, Register src) {
827 EnsureSpace ensure_space(this); 680 EnsureSpace ensure_space(this);
828 last_pc_ = pc_;
829 if (src.is(eax) || dst.is(eax)) { // Single-byte encoding. 681 if (src.is(eax) || dst.is(eax)) { // Single-byte encoding.
830 EMIT(0x90 | (src.is(eax) ? dst.code() : src.code())); 682 EMIT(0x90 | (src.is(eax) ? dst.code() : src.code()));
831 } else { 683 } else {
832 EMIT(0x87); 684 EMIT(0x87);
833 EMIT(0xC0 | src.code() << 3 | dst.code()); 685 EMIT(0xC0 | src.code() << 3 | dst.code());
834 } 686 }
835 } 687 }
836 688
837 689
838 void Assembler::adc(Register dst, int32_t imm32) { 690 void Assembler::adc(Register dst, int32_t imm32) {
839 EnsureSpace ensure_space(this); 691 EnsureSpace ensure_space(this);
840 last_pc_ = pc_;
841 emit_arith(2, Operand(dst), Immediate(imm32)); 692 emit_arith(2, Operand(dst), Immediate(imm32));
842 } 693 }
843 694
844 695
845 void Assembler::adc(Register dst, const Operand& src) { 696 void Assembler::adc(Register dst, const Operand& src) {
846 EnsureSpace ensure_space(this); 697 EnsureSpace ensure_space(this);
847 last_pc_ = pc_;
848 EMIT(0x13); 698 EMIT(0x13);
849 emit_operand(dst, src); 699 emit_operand(dst, src);
850 } 700 }
851 701
852 702
853 void Assembler::add(Register dst, const Operand& src) { 703 void Assembler::add(Register dst, const Operand& src) {
854 EnsureSpace ensure_space(this); 704 EnsureSpace ensure_space(this);
855 last_pc_ = pc_;
856 EMIT(0x03); 705 EMIT(0x03);
857 emit_operand(dst, src); 706 emit_operand(dst, src);
858 } 707 }
859 708
860 709
861 void Assembler::add(const Operand& dst, const Immediate& x) { 710 void Assembler::add(const Operand& dst, const Immediate& x) {
862 ASSERT(reloc_info_writer.last_pc() != NULL); 711 ASSERT(reloc_info_writer.last_pc() != NULL);
863 if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
864 byte instr = last_pc_[0];
865 if ((instr & 0xf8) == 0x50) {
866 // Last instruction was a push. Check whether this is a pop without a
867 // result.
868 if ((dst.is_reg(esp)) &&
869 (x.x_ == kPointerSize) && (x.rmode_ == RelocInfo::NONE)) {
870 pc_ = last_pc_;
871 last_pc_ = NULL;
872 if (FLAG_print_peephole_optimization) {
873 PrintF("%d push/pop(noreg) eliminated\n", pc_offset());
874 }
875 return;
876 }
877 }
878 }
879 EnsureSpace ensure_space(this); 712 EnsureSpace ensure_space(this);
880 last_pc_ = pc_;
881 emit_arith(0, dst, x); 713 emit_arith(0, dst, x);
882 } 714 }
883 715
884 716
885 void Assembler::and_(Register dst, int32_t imm32) { 717 void Assembler::and_(Register dst, int32_t imm32) {
886 and_(dst, Immediate(imm32)); 718 and_(dst, Immediate(imm32));
887 } 719 }
888 720
889 721
890 void Assembler::and_(Register dst, const Immediate& x) { 722 void Assembler::and_(Register dst, const Immediate& x) {
891 EnsureSpace ensure_space(this); 723 EnsureSpace ensure_space(this);
892 last_pc_ = pc_;
893 emit_arith(4, Operand(dst), x); 724 emit_arith(4, Operand(dst), x);
894 } 725 }
895 726
896 727
897 void Assembler::and_(Register dst, const Operand& src) { 728 void Assembler::and_(Register dst, const Operand& src) {
898 EnsureSpace ensure_space(this); 729 EnsureSpace ensure_space(this);
899 last_pc_ = pc_;
900 EMIT(0x23); 730 EMIT(0x23);
901 emit_operand(dst, src); 731 emit_operand(dst, src);
902 } 732 }
903 733
904 734
905 void Assembler::and_(const Operand& dst, const Immediate& x) { 735 void Assembler::and_(const Operand& dst, const Immediate& x) {
906 EnsureSpace ensure_space(this); 736 EnsureSpace ensure_space(this);
907 last_pc_ = pc_;
908 emit_arith(4, dst, x); 737 emit_arith(4, dst, x);
909 } 738 }
910 739
911 740
912 void Assembler::and_(const Operand& dst, Register src) { 741 void Assembler::and_(const Operand& dst, Register src) {
913 EnsureSpace ensure_space(this); 742 EnsureSpace ensure_space(this);
914 last_pc_ = pc_;
915 EMIT(0x21); 743 EMIT(0x21);
916 emit_operand(src, dst); 744 emit_operand(src, dst);
917 } 745 }
918 746
919 747
920 void Assembler::cmpb(const Operand& op, int8_t imm8) { 748 void Assembler::cmpb(const Operand& op, int8_t imm8) {
921 EnsureSpace ensure_space(this); 749 EnsureSpace ensure_space(this);
922 last_pc_ = pc_;
923 if (op.is_reg(eax)) { 750 if (op.is_reg(eax)) {
924 EMIT(0x3C); 751 EMIT(0x3C);
925 } else { 752 } else {
926 EMIT(0x80); 753 EMIT(0x80);
927 emit_operand(edi, op); // edi == 7 754 emit_operand(edi, op); // edi == 7
928 } 755 }
929 EMIT(imm8); 756 EMIT(imm8);
930 } 757 }
931 758
932 759
933 void Assembler::cmpb(const Operand& dst, Register src) { 760 void Assembler::cmpb(const Operand& dst, Register src) {
934 ASSERT(src.is_byte_register()); 761 ASSERT(src.is_byte_register());
935 EnsureSpace ensure_space(this); 762 EnsureSpace ensure_space(this);
936 last_pc_ = pc_;
937 EMIT(0x38); 763 EMIT(0x38);
938 emit_operand(src, dst); 764 emit_operand(src, dst);
939 } 765 }
940 766
941 767
942 void Assembler::cmpb(Register dst, const Operand& src) { 768 void Assembler::cmpb(Register dst, const Operand& src) {
943 ASSERT(dst.is_byte_register()); 769 ASSERT(dst.is_byte_register());
944 EnsureSpace ensure_space(this); 770 EnsureSpace ensure_space(this);
945 last_pc_ = pc_;
946 EMIT(0x3A); 771 EMIT(0x3A);
947 emit_operand(dst, src); 772 emit_operand(dst, src);
948 } 773 }
949 774
950 775
951 void Assembler::cmpw(const Operand& op, Immediate imm16) { 776 void Assembler::cmpw(const Operand& op, Immediate imm16) {
952 ASSERT(imm16.is_int16()); 777 ASSERT(imm16.is_int16());
953 EnsureSpace ensure_space(this); 778 EnsureSpace ensure_space(this);
954 last_pc_ = pc_;
955 EMIT(0x66); 779 EMIT(0x66);
956 EMIT(0x81); 780 EMIT(0x81);
957 emit_operand(edi, op); 781 emit_operand(edi, op);
958 emit_w(imm16); 782 emit_w(imm16);
959 } 783 }
960 784
961 785
962 void Assembler::cmp(Register reg, int32_t imm32) { 786 void Assembler::cmp(Register reg, int32_t imm32) {
963 EnsureSpace ensure_space(this); 787 EnsureSpace ensure_space(this);
964 last_pc_ = pc_;
965 emit_arith(7, Operand(reg), Immediate(imm32)); 788 emit_arith(7, Operand(reg), Immediate(imm32));
966 } 789 }
967 790
968 791
969 void Assembler::cmp(Register reg, Handle<Object> handle) { 792 void Assembler::cmp(Register reg, Handle<Object> handle) {
970 EnsureSpace ensure_space(this); 793 EnsureSpace ensure_space(this);
971 last_pc_ = pc_;
972 emit_arith(7, Operand(reg), Immediate(handle)); 794 emit_arith(7, Operand(reg), Immediate(handle));
973 } 795 }
974 796
975 797
976 void Assembler::cmp(Register reg, const Operand& op) { 798 void Assembler::cmp(Register reg, const Operand& op) {
977 EnsureSpace ensure_space(this); 799 EnsureSpace ensure_space(this);
978 last_pc_ = pc_;
979 EMIT(0x3B); 800 EMIT(0x3B);
980 emit_operand(reg, op); 801 emit_operand(reg, op);
981 } 802 }
982 803
983 804
984 void Assembler::cmp(const Operand& op, const Immediate& imm) { 805 void Assembler::cmp(const Operand& op, const Immediate& imm) {
985 EnsureSpace ensure_space(this); 806 EnsureSpace ensure_space(this);
986 last_pc_ = pc_;
987 emit_arith(7, op, imm); 807 emit_arith(7, op, imm);
988 } 808 }
989 809
990 810
991 void Assembler::cmp(const Operand& op, Handle<Object> handle) { 811 void Assembler::cmp(const Operand& op, Handle<Object> handle) {
992 EnsureSpace ensure_space(this); 812 EnsureSpace ensure_space(this);
993 last_pc_ = pc_;
994 emit_arith(7, op, Immediate(handle)); 813 emit_arith(7, op, Immediate(handle));
995 } 814 }
996 815
997 816
998 void Assembler::cmpb_al(const Operand& op) { 817 void Assembler::cmpb_al(const Operand& op) {
999 EnsureSpace ensure_space(this); 818 EnsureSpace ensure_space(this);
1000 last_pc_ = pc_;
1001 EMIT(0x38); // CMP r/m8, r8 819 EMIT(0x38); // CMP r/m8, r8
1002 emit_operand(eax, op); // eax has same code as register al. 820 emit_operand(eax, op); // eax has same code as register al.
1003 } 821 }
1004 822
1005 823
1006 void Assembler::cmpw_ax(const Operand& op) { 824 void Assembler::cmpw_ax(const Operand& op) {
1007 EnsureSpace ensure_space(this); 825 EnsureSpace ensure_space(this);
1008 last_pc_ = pc_;
1009 EMIT(0x66); 826 EMIT(0x66);
1010 EMIT(0x39); // CMP r/m16, r16 827 EMIT(0x39); // CMP r/m16, r16
1011 emit_operand(eax, op); // eax has same code as register ax. 828 emit_operand(eax, op); // eax has same code as register ax.
1012 } 829 }
1013 830
1014 831
1015 void Assembler::dec_b(Register dst) { 832 void Assembler::dec_b(Register dst) {
1016 EnsureSpace ensure_space(this); 833 EnsureSpace ensure_space(this);
1017 last_pc_ = pc_;
1018 EMIT(0xFE); 834 EMIT(0xFE);
1019 EMIT(0xC8 | dst.code()); 835 EMIT(0xC8 | dst.code());
1020 } 836 }
1021 837
1022 838
1023 void Assembler::dec_b(const Operand& dst) { 839 void Assembler::dec_b(const Operand& dst) {
1024 EnsureSpace ensure_space(this); 840 EnsureSpace ensure_space(this);
1025 last_pc_ = pc_;
1026 EMIT(0xFE); 841 EMIT(0xFE);
1027 emit_operand(ecx, dst); 842 emit_operand(ecx, dst);
1028 } 843 }
1029 844
1030 845
1031 void Assembler::dec(Register dst) { 846 void Assembler::dec(Register dst) {
1032 EnsureSpace ensure_space(this); 847 EnsureSpace ensure_space(this);
1033 last_pc_ = pc_;
1034 EMIT(0x48 | dst.code()); 848 EMIT(0x48 | dst.code());
1035 } 849 }
1036 850
1037 851
1038 void Assembler::dec(const Operand& dst) { 852 void Assembler::dec(const Operand& dst) {
1039 EnsureSpace ensure_space(this); 853 EnsureSpace ensure_space(this);
1040 last_pc_ = pc_;
1041 EMIT(0xFF); 854 EMIT(0xFF);
1042 emit_operand(ecx, dst); 855 emit_operand(ecx, dst);
1043 } 856 }
1044 857
1045 858
1046 void Assembler::cdq() { 859 void Assembler::cdq() {
1047 EnsureSpace ensure_space(this); 860 EnsureSpace ensure_space(this);
1048 last_pc_ = pc_;
1049 EMIT(0x99); 861 EMIT(0x99);
1050 } 862 }
1051 863
1052 864
1053 void Assembler::idiv(Register src) { 865 void Assembler::idiv(Register src) {
1054 EnsureSpace ensure_space(this); 866 EnsureSpace ensure_space(this);
1055 last_pc_ = pc_;
1056 EMIT(0xF7); 867 EMIT(0xF7);
1057 EMIT(0xF8 | src.code()); 868 EMIT(0xF8 | src.code());
1058 } 869 }
1059 870
1060 871
1061 void Assembler::imul(Register reg) { 872 void Assembler::imul(Register reg) {
1062 EnsureSpace ensure_space(this); 873 EnsureSpace ensure_space(this);
1063 last_pc_ = pc_;
1064 EMIT(0xF7); 874 EMIT(0xF7);
1065 EMIT(0xE8 | reg.code()); 875 EMIT(0xE8 | reg.code());
1066 } 876 }
1067 877
1068 878
1069 void Assembler::imul(Register dst, const Operand& src) { 879 void Assembler::imul(Register dst, const Operand& src) {
1070 EnsureSpace ensure_space(this); 880 EnsureSpace ensure_space(this);
1071 last_pc_ = pc_;
1072 EMIT(0x0F); 881 EMIT(0x0F);
1073 EMIT(0xAF); 882 EMIT(0xAF);
1074 emit_operand(dst, src); 883 emit_operand(dst, src);
1075 } 884 }
1076 885
1077 886
1078 void Assembler::imul(Register dst, Register src, int32_t imm32) { 887 void Assembler::imul(Register dst, Register src, int32_t imm32) {
1079 EnsureSpace ensure_space(this); 888 EnsureSpace ensure_space(this);
1080 last_pc_ = pc_;
1081 if (is_int8(imm32)) { 889 if (is_int8(imm32)) {
1082 EMIT(0x6B); 890 EMIT(0x6B);
1083 EMIT(0xC0 | dst.code() << 3 | src.code()); 891 EMIT(0xC0 | dst.code() << 3 | src.code());
1084 EMIT(imm32); 892 EMIT(imm32);
1085 } else { 893 } else {
1086 EMIT(0x69); 894 EMIT(0x69);
1087 EMIT(0xC0 | dst.code() << 3 | src.code()); 895 EMIT(0xC0 | dst.code() << 3 | src.code());
1088 emit(imm32); 896 emit(imm32);
1089 } 897 }
1090 } 898 }
1091 899
1092 900
1093 void Assembler::inc(Register dst) { 901 void Assembler::inc(Register dst) {
1094 EnsureSpace ensure_space(this); 902 EnsureSpace ensure_space(this);
1095 last_pc_ = pc_;
1096 EMIT(0x40 | dst.code()); 903 EMIT(0x40 | dst.code());
1097 } 904 }
1098 905
1099 906
1100 void Assembler::inc(const Operand& dst) { 907 void Assembler::inc(const Operand& dst) {
1101 EnsureSpace ensure_space(this); 908 EnsureSpace ensure_space(this);
1102 last_pc_ = pc_;
1103 EMIT(0xFF); 909 EMIT(0xFF);
1104 emit_operand(eax, dst); 910 emit_operand(eax, dst);
1105 } 911 }
1106 912
1107 913
1108 void Assembler::lea(Register dst, const Operand& src) { 914 void Assembler::lea(Register dst, const Operand& src) {
1109 EnsureSpace ensure_space(this); 915 EnsureSpace ensure_space(this);
1110 last_pc_ = pc_;
1111 EMIT(0x8D); 916 EMIT(0x8D);
1112 emit_operand(dst, src); 917 emit_operand(dst, src);
1113 } 918 }
1114 919
1115 920
1116 void Assembler::mul(Register src) { 921 void Assembler::mul(Register src) {
1117 EnsureSpace ensure_space(this); 922 EnsureSpace ensure_space(this);
1118 last_pc_ = pc_;
1119 EMIT(0xF7); 923 EMIT(0xF7);
1120 EMIT(0xE0 | src.code()); 924 EMIT(0xE0 | src.code());
1121 } 925 }
1122 926
1123 927
1124 void Assembler::neg(Register dst) { 928 void Assembler::neg(Register dst) {
1125 EnsureSpace ensure_space(this); 929 EnsureSpace ensure_space(this);
1126 last_pc_ = pc_;
1127 EMIT(0xF7); 930 EMIT(0xF7);
1128 EMIT(0xD8 | dst.code()); 931 EMIT(0xD8 | dst.code());
1129 } 932 }
1130 933
1131 934
1132 void Assembler::not_(Register dst) { 935 void Assembler::not_(Register dst) {
1133 EnsureSpace ensure_space(this); 936 EnsureSpace ensure_space(this);
1134 last_pc_ = pc_;
1135 EMIT(0xF7); 937 EMIT(0xF7);
1136 EMIT(0xD0 | dst.code()); 938 EMIT(0xD0 | dst.code());
1137 } 939 }
1138 940
1139 941
1140 void Assembler::or_(Register dst, int32_t imm32) { 942 void Assembler::or_(Register dst, int32_t imm32) {
1141 EnsureSpace ensure_space(this); 943 EnsureSpace ensure_space(this);
1142 last_pc_ = pc_;
1143 emit_arith(1, Operand(dst), Immediate(imm32)); 944 emit_arith(1, Operand(dst), Immediate(imm32));
1144 } 945 }
1145 946
1146 947
1147 void Assembler::or_(Register dst, const Operand& src) { 948 void Assembler::or_(Register dst, const Operand& src) {
1148 EnsureSpace ensure_space(this); 949 EnsureSpace ensure_space(this);
1149 last_pc_ = pc_;
1150 EMIT(0x0B); 950 EMIT(0x0B);
1151 emit_operand(dst, src); 951 emit_operand(dst, src);
1152 } 952 }
1153 953
1154 954
1155 void Assembler::or_(const Operand& dst, const Immediate& x) { 955 void Assembler::or_(const Operand& dst, const Immediate& x) {
1156 EnsureSpace ensure_space(this); 956 EnsureSpace ensure_space(this);
1157 last_pc_ = pc_;
1158 emit_arith(1, dst, x); 957 emit_arith(1, dst, x);
1159 } 958 }
1160 959
1161 960
1162 void Assembler::or_(const Operand& dst, Register src) { 961 void Assembler::or_(const Operand& dst, Register src) {
1163 EnsureSpace ensure_space(this); 962 EnsureSpace ensure_space(this);
1164 last_pc_ = pc_;
1165 EMIT(0x09); 963 EMIT(0x09);
1166 emit_operand(src, dst); 964 emit_operand(src, dst);
1167 } 965 }
1168 966
1169 967
1170 void Assembler::rcl(Register dst, uint8_t imm8) { 968 void Assembler::rcl(Register dst, uint8_t imm8) {
1171 EnsureSpace ensure_space(this); 969 EnsureSpace ensure_space(this);
1172 last_pc_ = pc_;
1173 ASSERT(is_uint5(imm8)); // illegal shift count 970 ASSERT(is_uint5(imm8)); // illegal shift count
1174 if (imm8 == 1) { 971 if (imm8 == 1) {
1175 EMIT(0xD1); 972 EMIT(0xD1);
1176 EMIT(0xD0 | dst.code()); 973 EMIT(0xD0 | dst.code());
1177 } else { 974 } else {
1178 EMIT(0xC1); 975 EMIT(0xC1);
1179 EMIT(0xD0 | dst.code()); 976 EMIT(0xD0 | dst.code());
1180 EMIT(imm8); 977 EMIT(imm8);
1181 } 978 }
1182 } 979 }
1183 980
1184 981
1185 void Assembler::rcr(Register dst, uint8_t imm8) { 982 void Assembler::rcr(Register dst, uint8_t imm8) {
1186 EnsureSpace ensure_space(this); 983 EnsureSpace ensure_space(this);
1187 last_pc_ = pc_;
1188 ASSERT(is_uint5(imm8)); // illegal shift count 984 ASSERT(is_uint5(imm8)); // illegal shift count
1189 if (imm8 == 1) { 985 if (imm8 == 1) {
1190 EMIT(0xD1); 986 EMIT(0xD1);
1191 EMIT(0xD8 | dst.code()); 987 EMIT(0xD8 | dst.code());
1192 } else { 988 } else {
1193 EMIT(0xC1); 989 EMIT(0xC1);
1194 EMIT(0xD8 | dst.code()); 990 EMIT(0xD8 | dst.code());
1195 EMIT(imm8); 991 EMIT(imm8);
1196 } 992 }
1197 } 993 }
1198 994
1199 995
1200 void Assembler::sar(Register dst, uint8_t imm8) { 996 void Assembler::sar(Register dst, uint8_t imm8) {
1201 EnsureSpace ensure_space(this); 997 EnsureSpace ensure_space(this);
1202 last_pc_ = pc_;
1203 ASSERT(is_uint5(imm8)); // illegal shift count 998 ASSERT(is_uint5(imm8)); // illegal shift count
1204 if (imm8 == 1) { 999 if (imm8 == 1) {
1205 EMIT(0xD1); 1000 EMIT(0xD1);
1206 EMIT(0xF8 | dst.code()); 1001 EMIT(0xF8 | dst.code());
1207 } else { 1002 } else {
1208 EMIT(0xC1); 1003 EMIT(0xC1);
1209 EMIT(0xF8 | dst.code()); 1004 EMIT(0xF8 | dst.code());
1210 EMIT(imm8); 1005 EMIT(imm8);
1211 } 1006 }
1212 } 1007 }
1213 1008
1214 1009
1215 void Assembler::sar_cl(Register dst) { 1010 void Assembler::sar_cl(Register dst) {
1216 EnsureSpace ensure_space(this); 1011 EnsureSpace ensure_space(this);
1217 last_pc_ = pc_;
1218 EMIT(0xD3); 1012 EMIT(0xD3);
1219 EMIT(0xF8 | dst.code()); 1013 EMIT(0xF8 | dst.code());
1220 } 1014 }
1221 1015
1222 1016
1223 void Assembler::sbb(Register dst, const Operand& src) { 1017 void Assembler::sbb(Register dst, const Operand& src) {
1224 EnsureSpace ensure_space(this); 1018 EnsureSpace ensure_space(this);
1225 last_pc_ = pc_;
1226 EMIT(0x1B); 1019 EMIT(0x1B);
1227 emit_operand(dst, src); 1020 emit_operand(dst, src);
1228 } 1021 }
1229 1022
1230 1023
1231 void Assembler::shld(Register dst, const Operand& src) { 1024 void Assembler::shld(Register dst, const Operand& src) {
1232 EnsureSpace ensure_space(this); 1025 EnsureSpace ensure_space(this);
1233 last_pc_ = pc_;
1234 EMIT(0x0F); 1026 EMIT(0x0F);
1235 EMIT(0xA5); 1027 EMIT(0xA5);
1236 emit_operand(dst, src); 1028 emit_operand(dst, src);
1237 } 1029 }
1238 1030
1239 1031
1240 void Assembler::shl(Register dst, uint8_t imm8) { 1032 void Assembler::shl(Register dst, uint8_t imm8) {
1241 EnsureSpace ensure_space(this); 1033 EnsureSpace ensure_space(this);
1242 last_pc_ = pc_;
1243 ASSERT(is_uint5(imm8)); // illegal shift count 1034 ASSERT(is_uint5(imm8)); // illegal shift count
1244 if (imm8 == 1) { 1035 if (imm8 == 1) {
1245 EMIT(0xD1); 1036 EMIT(0xD1);
1246 EMIT(0xE0 | dst.code()); 1037 EMIT(0xE0 | dst.code());
1247 } else { 1038 } else {
1248 EMIT(0xC1); 1039 EMIT(0xC1);
1249 EMIT(0xE0 | dst.code()); 1040 EMIT(0xE0 | dst.code());
1250 EMIT(imm8); 1041 EMIT(imm8);
1251 } 1042 }
1252 } 1043 }
1253 1044
1254 1045
1255 void Assembler::shl_cl(Register dst) { 1046 void Assembler::shl_cl(Register dst) {
1256 EnsureSpace ensure_space(this); 1047 EnsureSpace ensure_space(this);
1257 last_pc_ = pc_;
1258 EMIT(0xD3); 1048 EMIT(0xD3);
1259 EMIT(0xE0 | dst.code()); 1049 EMIT(0xE0 | dst.code());
1260 } 1050 }
1261 1051
1262 1052
1263 void Assembler::shrd(Register dst, const Operand& src) { 1053 void Assembler::shrd(Register dst, const Operand& src) {
1264 EnsureSpace ensure_space(this); 1054 EnsureSpace ensure_space(this);
1265 last_pc_ = pc_;
1266 EMIT(0x0F); 1055 EMIT(0x0F);
1267 EMIT(0xAD); 1056 EMIT(0xAD);
1268 emit_operand(dst, src); 1057 emit_operand(dst, src);
1269 } 1058 }
1270 1059
1271 1060
1272 void Assembler::shr(Register dst, uint8_t imm8) { 1061 void Assembler::shr(Register dst, uint8_t imm8) {
1273 EnsureSpace ensure_space(this); 1062 EnsureSpace ensure_space(this);
1274 last_pc_ = pc_;
1275 ASSERT(is_uint5(imm8)); // illegal shift count 1063 ASSERT(is_uint5(imm8)); // illegal shift count
1276 if (imm8 == 1) { 1064 if (imm8 == 1) {
1277 EMIT(0xD1); 1065 EMIT(0xD1);
1278 EMIT(0xE8 | dst.code()); 1066 EMIT(0xE8 | dst.code());
1279 } else { 1067 } else {
1280 EMIT(0xC1); 1068 EMIT(0xC1);
1281 EMIT(0xE8 | dst.code()); 1069 EMIT(0xE8 | dst.code());
1282 EMIT(imm8); 1070 EMIT(imm8);
1283 } 1071 }
1284 } 1072 }
1285 1073
1286 1074
1287 void Assembler::shr_cl(Register dst) { 1075 void Assembler::shr_cl(Register dst) {
1288 EnsureSpace ensure_space(this); 1076 EnsureSpace ensure_space(this);
1289 last_pc_ = pc_;
1290 EMIT(0xD3); 1077 EMIT(0xD3);
1291 EMIT(0xE8 | dst.code()); 1078 EMIT(0xE8 | dst.code());
1292 } 1079 }
1293 1080
1294 1081
1295 void Assembler::sub(const Operand& dst, const Immediate& x) { 1082 void Assembler::sub(const Operand& dst, const Immediate& x) {
1296 EnsureSpace ensure_space(this); 1083 EnsureSpace ensure_space(this);
1297 last_pc_ = pc_;
1298 emit_arith(5, dst, x); 1084 emit_arith(5, dst, x);
1299 } 1085 }
1300 1086
1301 1087
1302 void Assembler::sub(Register dst, const Operand& src) { 1088 void Assembler::sub(Register dst, const Operand& src) {
1303 EnsureSpace ensure_space(this); 1089 EnsureSpace ensure_space(this);
1304 last_pc_ = pc_;
1305 EMIT(0x2B); 1090 EMIT(0x2B);
1306 emit_operand(dst, src); 1091 emit_operand(dst, src);
1307 } 1092 }
1308 1093
1309 1094
1310 void Assembler::sub(const Operand& dst, Register src) { 1095 void Assembler::sub(const Operand& dst, Register src) {
1311 EnsureSpace ensure_space(this); 1096 EnsureSpace ensure_space(this);
1312 last_pc_ = pc_;
1313 EMIT(0x29); 1097 EMIT(0x29);
1314 emit_operand(src, dst); 1098 emit_operand(src, dst);
1315 } 1099 }
1316 1100
1317 1101
1318 void Assembler::test(Register reg, const Immediate& imm) { 1102 void Assembler::test(Register reg, const Immediate& imm) {
1319 EnsureSpace ensure_space(this); 1103 EnsureSpace ensure_space(this);
1320 last_pc_ = pc_;
1321 // Only use test against byte for registers that have a byte 1104 // Only use test against byte for registers that have a byte
1322 // variant: eax, ebx, ecx, and edx. 1105 // variant: eax, ebx, ecx, and edx.
1323 if (imm.rmode_ == RelocInfo::NONE && is_uint8(imm.x_) && reg.code() < 4) { 1106 if (imm.rmode_ == RelocInfo::NONE && is_uint8(imm.x_) && reg.code() < 4) {
1324 uint8_t imm8 = imm.x_; 1107 uint8_t imm8 = imm.x_;
1325 if (reg.is(eax)) { 1108 if (reg.is(eax)) {
1326 EMIT(0xA8); 1109 EMIT(0xA8);
1327 EMIT(imm8); 1110 EMIT(imm8);
1328 } else { 1111 } else {
1329 emit_arith_b(0xF6, 0xC0, reg, imm8); 1112 emit_arith_b(0xF6, 0xC0, reg, imm8);
1330 } 1113 }
1331 } else { 1114 } else {
1332 // This is not using emit_arith because test doesn't support 1115 // This is not using emit_arith because test doesn't support
1333 // sign-extension of 8-bit operands. 1116 // sign-extension of 8-bit operands.
1334 if (reg.is(eax)) { 1117 if (reg.is(eax)) {
1335 EMIT(0xA9); 1118 EMIT(0xA9);
1336 } else { 1119 } else {
1337 EMIT(0xF7); 1120 EMIT(0xF7);
1338 EMIT(0xC0 | reg.code()); 1121 EMIT(0xC0 | reg.code());
1339 } 1122 }
1340 emit(imm); 1123 emit(imm);
1341 } 1124 }
1342 } 1125 }
1343 1126
1344 1127
1345 void Assembler::test(Register reg, const Operand& op) { 1128 void Assembler::test(Register reg, const Operand& op) {
1346 EnsureSpace ensure_space(this); 1129 EnsureSpace ensure_space(this);
1347 last_pc_ = pc_;
1348 EMIT(0x85); 1130 EMIT(0x85);
1349 emit_operand(reg, op); 1131 emit_operand(reg, op);
1350 } 1132 }
1351 1133
1352 1134
1353 void Assembler::test_b(Register reg, const Operand& op) { 1135 void Assembler::test_b(Register reg, const Operand& op) {
1354 EnsureSpace ensure_space(this); 1136 EnsureSpace ensure_space(this);
1355 last_pc_ = pc_;
1356 EMIT(0x84); 1137 EMIT(0x84);
1357 emit_operand(reg, op); 1138 emit_operand(reg, op);
1358 } 1139 }
1359 1140
1360 1141
1361 void Assembler::test(const Operand& op, const Immediate& imm) { 1142 void Assembler::test(const Operand& op, const Immediate& imm) {
1362 EnsureSpace ensure_space(this); 1143 EnsureSpace ensure_space(this);
1363 last_pc_ = pc_;
1364 EMIT(0xF7); 1144 EMIT(0xF7);
1365 emit_operand(eax, op); 1145 emit_operand(eax, op);
1366 emit(imm); 1146 emit(imm);
1367 } 1147 }
1368 1148
1369 1149
1370 void Assembler::test_b(const Operand& op, uint8_t imm8) { 1150 void Assembler::test_b(const Operand& op, uint8_t imm8) {
1371 if (op.is_reg_only() && op.reg().code() >= 4) { 1151 if (op.is_reg_only() && op.reg().code() >= 4) {
1372 test(op, Immediate(imm8)); 1152 test(op, Immediate(imm8));
1373 return; 1153 return;
1374 } 1154 }
1375 EnsureSpace ensure_space(this); 1155 EnsureSpace ensure_space(this);
1376 last_pc_ = pc_;
1377 EMIT(0xF6); 1156 EMIT(0xF6);
1378 emit_operand(eax, op); 1157 emit_operand(eax, op);
1379 EMIT(imm8); 1158 EMIT(imm8);
1380 } 1159 }
1381 1160
1382 1161
1383 void Assembler::xor_(Register dst, int32_t imm32) { 1162 void Assembler::xor_(Register dst, int32_t imm32) {
1384 EnsureSpace ensure_space(this); 1163 EnsureSpace ensure_space(this);
1385 last_pc_ = pc_;
1386 emit_arith(6, Operand(dst), Immediate(imm32)); 1164 emit_arith(6, Operand(dst), Immediate(imm32));
1387 } 1165 }
1388 1166
1389 1167
1390 void Assembler::xor_(Register dst, const Operand& src) { 1168 void Assembler::xor_(Register dst, const Operand& src) {
1391 EnsureSpace ensure_space(this); 1169 EnsureSpace ensure_space(this);
1392 last_pc_ = pc_;
1393 EMIT(0x33); 1170 EMIT(0x33);
1394 emit_operand(dst, src); 1171 emit_operand(dst, src);
1395 } 1172 }
1396 1173
1397 1174
1398 void Assembler::xor_(const Operand& src, Register dst) { 1175 void Assembler::xor_(const Operand& src, Register dst) {
1399 EnsureSpace ensure_space(this); 1176 EnsureSpace ensure_space(this);
1400 last_pc_ = pc_;
1401 EMIT(0x31); 1177 EMIT(0x31);
1402 emit_operand(dst, src); 1178 emit_operand(dst, src);
1403 } 1179 }
1404 1180
1405 1181
1406 void Assembler::xor_(const Operand& dst, const Immediate& x) { 1182 void Assembler::xor_(const Operand& dst, const Immediate& x) {
1407 EnsureSpace ensure_space(this); 1183 EnsureSpace ensure_space(this);
1408 last_pc_ = pc_;
1409 emit_arith(6, dst, x); 1184 emit_arith(6, dst, x);
1410 } 1185 }
1411 1186
1412 1187
1413 void Assembler::bt(const Operand& dst, Register src) { 1188 void Assembler::bt(const Operand& dst, Register src) {
1414 EnsureSpace ensure_space(this); 1189 EnsureSpace ensure_space(this);
1415 last_pc_ = pc_;
1416 EMIT(0x0F); 1190 EMIT(0x0F);
1417 EMIT(0xA3); 1191 EMIT(0xA3);
1418 emit_operand(src, dst); 1192 emit_operand(src, dst);
1419 } 1193 }
1420 1194
1421 1195
1422 void Assembler::bts(const Operand& dst, Register src) { 1196 void Assembler::bts(const Operand& dst, Register src) {
1423 EnsureSpace ensure_space(this); 1197 EnsureSpace ensure_space(this);
1424 last_pc_ = pc_;
1425 EMIT(0x0F); 1198 EMIT(0x0F);
1426 EMIT(0xAB); 1199 EMIT(0xAB);
1427 emit_operand(src, dst); 1200 emit_operand(src, dst);
1428 } 1201 }
1429 1202
1430 1203
1431 void Assembler::hlt() { 1204 void Assembler::hlt() {
1432 EnsureSpace ensure_space(this); 1205 EnsureSpace ensure_space(this);
1433 last_pc_ = pc_;
1434 EMIT(0xF4); 1206 EMIT(0xF4);
1435 } 1207 }
1436 1208
1437 1209
1438 void Assembler::int3() { 1210 void Assembler::int3() {
1439 EnsureSpace ensure_space(this); 1211 EnsureSpace ensure_space(this);
1440 last_pc_ = pc_;
1441 EMIT(0xCC); 1212 EMIT(0xCC);
1442 } 1213 }
1443 1214
1444 1215
1445 void Assembler::nop() { 1216 void Assembler::nop() {
1446 EnsureSpace ensure_space(this); 1217 EnsureSpace ensure_space(this);
1447 last_pc_ = pc_;
1448 EMIT(0x90); 1218 EMIT(0x90);
1449 } 1219 }
1450 1220
1451 1221
1452 void Assembler::rdtsc() { 1222 void Assembler::rdtsc() {
1453 ASSERT(CpuFeatures::IsEnabled(RDTSC)); 1223 ASSERT(CpuFeatures::IsEnabled(RDTSC));
1454 EnsureSpace ensure_space(this); 1224 EnsureSpace ensure_space(this);
1455 last_pc_ = pc_;
1456 EMIT(0x0F); 1225 EMIT(0x0F);
1457 EMIT(0x31); 1226 EMIT(0x31);
1458 } 1227 }
1459 1228
1460 1229
1461 void Assembler::ret(int imm16) { 1230 void Assembler::ret(int imm16) {
1462 EnsureSpace ensure_space(this); 1231 EnsureSpace ensure_space(this);
1463 last_pc_ = pc_;
1464 ASSERT(is_uint16(imm16)); 1232 ASSERT(is_uint16(imm16));
1465 if (imm16 == 0) { 1233 if (imm16 == 0) {
1466 EMIT(0xC3); 1234 EMIT(0xC3);
1467 } else { 1235 } else {
1468 EMIT(0xC2); 1236 EMIT(0xC2);
1469 EMIT(imm16 & 0xFF); 1237 EMIT(imm16 & 0xFF);
1470 EMIT((imm16 >> 8) & 0xFF); 1238 EMIT((imm16 >> 8) & 0xFF);
1471 } 1239 }
1472 } 1240 }
1473 1241
(...skipping 25 matching lines...) Expand all
1499 disp.next(&l); 1267 disp.next(&l);
1500 } 1268 }
1501 } else { 1269 } else {
1502 PrintF("label in inconsistent state (pos = %d)\n", L->pos_); 1270 PrintF("label in inconsistent state (pos = %d)\n", L->pos_);
1503 } 1271 }
1504 } 1272 }
1505 1273
1506 1274
1507 void Assembler::bind_to(Label* L, int pos) { 1275 void Assembler::bind_to(Label* L, int pos) {
1508 EnsureSpace ensure_space(this); 1276 EnsureSpace ensure_space(this);
1509 last_pc_ = NULL;
1510 ASSERT(0 <= pos && pos <= pc_offset()); // must have a valid binding position 1277 ASSERT(0 <= pos && pos <= pc_offset()); // must have a valid binding position
1511 while (L->is_linked()) { 1278 while (L->is_linked()) {
1512 Displacement disp = disp_at(L); 1279 Displacement disp = disp_at(L);
1513 int fixup_pos = L->pos(); 1280 int fixup_pos = L->pos();
1514 if (disp.type() == Displacement::CODE_RELATIVE) { 1281 if (disp.type() == Displacement::CODE_RELATIVE) {
1515 // Relative to Code* heap object pointer. 1282 // Relative to Code* heap object pointer.
1516 long_at_put(fixup_pos, pos + Code::kHeaderSize - kHeapObjectTag); 1283 long_at_put(fixup_pos, pos + Code::kHeaderSize - kHeapObjectTag);
1517 } else { 1284 } else {
1518 if (disp.type() == Displacement::UNCONDITIONAL_JUMP) { 1285 if (disp.type() == Displacement::UNCONDITIONAL_JUMP) {
1519 ASSERT(byte_at(fixup_pos - 1) == 0xE9); // jmp expected 1286 ASSERT(byte_at(fixup_pos - 1) == 0xE9); // jmp expected
1520 } 1287 }
1521 // Relative address, relative to point after address. 1288 // Relative address, relative to point after address.
1522 int imm32 = pos - (fixup_pos + sizeof(int32_t)); 1289 int imm32 = pos - (fixup_pos + sizeof(int32_t));
1523 long_at_put(fixup_pos, imm32); 1290 long_at_put(fixup_pos, imm32);
1524 } 1291 }
1525 disp.next(L); 1292 disp.next(L);
1526 } 1293 }
1294 while (L->is_near_linked()) {
1295 int fixup_pos = L->near_link_pos();
1296 int offset_to_next =
1297 static_cast<int>(*reinterpret_cast<int8_t*>(addr_at(fixup_pos)));
1298 ASSERT(offset_to_next <= 0);
1299 // Relative address, relative to point after address.
1300 int disp = pos - fixup_pos - sizeof(int8_t);
1301 ASSERT(0 <= disp && disp <= 127);
1302 set_byte_at(fixup_pos, disp);
1303 if (offset_to_next < 0) {
1304 L->link_to(fixup_pos + offset_to_next, Label::kNear);
1305 } else {
1306 L->UnuseNear();
1307 }
1308 }
1527 L->bind_to(pos); 1309 L->bind_to(pos);
1528 } 1310 }
1529 1311
1530 1312
1531 void Assembler::bind(Label* L) { 1313 void Assembler::bind(Label* L) {
1532 EnsureSpace ensure_space(this); 1314 EnsureSpace ensure_space(this);
1533 last_pc_ = NULL;
1534 ASSERT(!L->is_bound()); // label can only be bound once 1315 ASSERT(!L->is_bound()); // label can only be bound once
1535 bind_to(L, pc_offset()); 1316 bind_to(L, pc_offset());
1536 } 1317 }
1537 1318
1538 1319
1539 void Assembler::bind(NearLabel* L) {
1540 ASSERT(!L->is_bound());
1541 last_pc_ = NULL;
1542 while (L->unresolved_branches_ > 0) {
1543 int branch_pos = L->unresolved_positions_[L->unresolved_branches_ - 1];
1544 int disp = pc_offset() - branch_pos;
1545 ASSERT(is_int8(disp));
1546 set_byte_at(branch_pos - sizeof(int8_t), disp);
1547 L->unresolved_branches_--;
1548 }
1549 L->bind_to(pc_offset());
1550 }
1551
1552
1553 void Assembler::call(Label* L) { 1320 void Assembler::call(Label* L) {
1554 positions_recorder()->WriteRecordedPositions(); 1321 positions_recorder()->WriteRecordedPositions();
1555 EnsureSpace ensure_space(this); 1322 EnsureSpace ensure_space(this);
1556 last_pc_ = pc_;
1557 if (L->is_bound()) { 1323 if (L->is_bound()) {
1558 const int long_size = 5; 1324 const int long_size = 5;
1559 int offs = L->pos() - pc_offset(); 1325 int offs = L->pos() - pc_offset();
1560 ASSERT(offs <= 0); 1326 ASSERT(offs <= 0);
1561 // 1110 1000 #32-bit disp. 1327 // 1110 1000 #32-bit disp.
1562 EMIT(0xE8); 1328 EMIT(0xE8);
1563 emit(offs - long_size); 1329 emit(offs - long_size);
1564 } else { 1330 } else {
1565 // 1110 1000 #32-bit disp. 1331 // 1110 1000 #32-bit disp.
1566 EMIT(0xE8); 1332 EMIT(0xE8);
1567 emit_disp(L, Displacement::OTHER); 1333 emit_disp(L, Displacement::OTHER);
1568 } 1334 }
1569 } 1335 }
1570 1336
1571 1337
1572 void Assembler::call(byte* entry, RelocInfo::Mode rmode) { 1338 void Assembler::call(byte* entry, RelocInfo::Mode rmode) {
1573 positions_recorder()->WriteRecordedPositions(); 1339 positions_recorder()->WriteRecordedPositions();
1574 EnsureSpace ensure_space(this); 1340 EnsureSpace ensure_space(this);
1575 last_pc_ = pc_;
1576 ASSERT(!RelocInfo::IsCodeTarget(rmode)); 1341 ASSERT(!RelocInfo::IsCodeTarget(rmode));
1577 EMIT(0xE8); 1342 EMIT(0xE8);
1578 emit(entry - (pc_ + sizeof(int32_t)), rmode); 1343 emit(entry - (pc_ + sizeof(int32_t)), rmode);
1579 } 1344 }
1580 1345
1581 1346
1582 int Assembler::CallSize(const Operand& adr) { 1347 int Assembler::CallSize(const Operand& adr) {
1583 // Call size is 1 (opcode) + adr.len_ (operand). 1348 // Call size is 1 (opcode) + adr.len_ (operand).
1584 return 1 + adr.len_; 1349 return 1 + adr.len_;
1585 } 1350 }
1586 1351
1587 1352
1588 void Assembler::call(const Operand& adr) { 1353 void Assembler::call(const Operand& adr) {
1589 positions_recorder()->WriteRecordedPositions(); 1354 positions_recorder()->WriteRecordedPositions();
1590 EnsureSpace ensure_space(this); 1355 EnsureSpace ensure_space(this);
1591 last_pc_ = pc_;
1592 EMIT(0xFF); 1356 EMIT(0xFF);
1593 emit_operand(edx, adr); 1357 emit_operand(edx, adr);
1594 ASSERT(pc_ - last_pc_ == CallSize(adr));
1595 } 1358 }
1596 1359
1597 1360
1598 int Assembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode) { 1361 int Assembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode) {
1599 return 1 /* EMIT */ + sizeof(uint32_t) /* emit */; 1362 return 1 /* EMIT */ + sizeof(uint32_t) /* emit */;
1600 } 1363 }
1601 1364
1602 1365
1603 void Assembler::call(Handle<Code> code, 1366 void Assembler::call(Handle<Code> code,
1604 RelocInfo::Mode rmode, 1367 RelocInfo::Mode rmode,
1605 unsigned ast_id) { 1368 unsigned ast_id) {
1606 positions_recorder()->WriteRecordedPositions(); 1369 positions_recorder()->WriteRecordedPositions();
1607 EnsureSpace ensure_space(this); 1370 EnsureSpace ensure_space(this);
1608 last_pc_ = pc_;
1609 ASSERT(RelocInfo::IsCodeTarget(rmode)); 1371 ASSERT(RelocInfo::IsCodeTarget(rmode));
1610 EMIT(0xE8); 1372 EMIT(0xE8);
1611 emit(reinterpret_cast<intptr_t>(code.location()), rmode, ast_id); 1373 emit(reinterpret_cast<intptr_t>(code.location()), rmode, ast_id);
1612 } 1374 }
1613 1375
1614 1376
1615 void Assembler::jmp(Label* L) { 1377 void Assembler::jmp(Label* L, Label::Distance distance) {
1616 EnsureSpace ensure_space(this); 1378 EnsureSpace ensure_space(this);
1617 last_pc_ = pc_;
1618 if (L->is_bound()) { 1379 if (L->is_bound()) {
1619 const int short_size = 2; 1380 const int short_size = 2;
1620 const int long_size = 5; 1381 const int long_size = 5;
1621 int offs = L->pos() - pc_offset(); 1382 int offs = L->pos() - pc_offset();
1622 ASSERT(offs <= 0); 1383 ASSERT(offs <= 0);
1623 if (is_int8(offs - short_size)) { 1384 if (is_int8(offs - short_size)) {
1624 // 1110 1011 #8-bit disp. 1385 // 1110 1011 #8-bit disp.
1625 EMIT(0xEB); 1386 EMIT(0xEB);
1626 EMIT((offs - short_size) & 0xFF); 1387 EMIT((offs - short_size) & 0xFF);
1627 } else { 1388 } else {
1628 // 1110 1001 #32-bit disp. 1389 // 1110 1001 #32-bit disp.
1629 EMIT(0xE9); 1390 EMIT(0xE9);
1630 emit(offs - long_size); 1391 emit(offs - long_size);
1631 } 1392 }
1393 } else if (distance == Label::kNear) {
1394 EMIT(0xEB);
1395 emit_near_disp(L);
1632 } else { 1396 } else {
1633 // 1110 1001 #32-bit disp. 1397 // 1110 1001 #32-bit disp.
1634 EMIT(0xE9); 1398 EMIT(0xE9);
1635 emit_disp(L, Displacement::UNCONDITIONAL_JUMP); 1399 emit_disp(L, Displacement::UNCONDITIONAL_JUMP);
1636 } 1400 }
1637 } 1401 }
1638 1402
1639 1403
1640 void Assembler::jmp(byte* entry, RelocInfo::Mode rmode) { 1404 void Assembler::jmp(byte* entry, RelocInfo::Mode rmode) {
1641 EnsureSpace ensure_space(this); 1405 EnsureSpace ensure_space(this);
1642 last_pc_ = pc_;
1643 ASSERT(!RelocInfo::IsCodeTarget(rmode)); 1406 ASSERT(!RelocInfo::IsCodeTarget(rmode));
1644 EMIT(0xE9); 1407 EMIT(0xE9);
1645 emit(entry - (pc_ + sizeof(int32_t)), rmode); 1408 emit(entry - (pc_ + sizeof(int32_t)), rmode);
1646 } 1409 }
1647 1410
1648 1411
1649 void Assembler::jmp(const Operand& adr) { 1412 void Assembler::jmp(const Operand& adr) {
1650 EnsureSpace ensure_space(this); 1413 EnsureSpace ensure_space(this);
1651 last_pc_ = pc_;
1652 EMIT(0xFF); 1414 EMIT(0xFF);
1653 emit_operand(esp, adr); 1415 emit_operand(esp, adr);
1654 } 1416 }
1655 1417
1656 1418
1657 void Assembler::jmp(Handle<Code> code, RelocInfo::Mode rmode) { 1419 void Assembler::jmp(Handle<Code> code, RelocInfo::Mode rmode) {
1658 EnsureSpace ensure_space(this); 1420 EnsureSpace ensure_space(this);
1659 last_pc_ = pc_;
1660 ASSERT(RelocInfo::IsCodeTarget(rmode)); 1421 ASSERT(RelocInfo::IsCodeTarget(rmode));
1661 EMIT(0xE9); 1422 EMIT(0xE9);
1662 emit(reinterpret_cast<intptr_t>(code.location()), rmode); 1423 emit(reinterpret_cast<intptr_t>(code.location()), rmode);
1663 } 1424 }
1664 1425
1665 1426
1666 void Assembler::jmp(NearLabel* L) { 1427 void Assembler::j(Condition cc, Label* L, Label::Distance distance) {
1667 EnsureSpace ensure_space(this); 1428 EnsureSpace ensure_space(this);
1668 last_pc_ = pc_;
1669 if (L->is_bound()) {
1670 const int short_size = 2;
1671 int offs = L->pos() - pc_offset();
1672 ASSERT(offs <= 0);
1673 ASSERT(is_int8(offs - short_size));
1674 // 1110 1011 #8-bit disp.
1675 EMIT(0xEB);
1676 EMIT((offs - short_size) & 0xFF);
1677 } else {
1678 EMIT(0xEB);
1679 EMIT(0x00); // The displacement will be resolved later.
1680 L->link_to(pc_offset());
1681 }
1682 }
1683
1684
1685 void Assembler::j(Condition cc, Label* L, Hint hint) {
1686 EnsureSpace ensure_space(this);
1687 last_pc_ = pc_;
1688 ASSERT(0 <= cc && cc < 16); 1429 ASSERT(0 <= cc && cc < 16);
1689 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
1690 if (L->is_bound()) { 1430 if (L->is_bound()) {
1691 const int short_size = 2; 1431 const int short_size = 2;
1692 const int long_size = 6; 1432 const int long_size = 6;
1693 int offs = L->pos() - pc_offset(); 1433 int offs = L->pos() - pc_offset();
1694 ASSERT(offs <= 0); 1434 ASSERT(offs <= 0);
1695 if (is_int8(offs - short_size)) { 1435 if (is_int8(offs - short_size)) {
1696 // 0111 tttn #8-bit disp 1436 // 0111 tttn #8-bit disp
1697 EMIT(0x70 | cc); 1437 EMIT(0x70 | cc);
1698 EMIT((offs - short_size) & 0xFF); 1438 EMIT((offs - short_size) & 0xFF);
1699 } else { 1439 } else {
1700 // 0000 1111 1000 tttn #32-bit disp 1440 // 0000 1111 1000 tttn #32-bit disp
1701 EMIT(0x0F); 1441 EMIT(0x0F);
1702 EMIT(0x80 | cc); 1442 EMIT(0x80 | cc);
1703 emit(offs - long_size); 1443 emit(offs - long_size);
1704 } 1444 }
1445 } else if (distance == Label::kNear) {
1446 EMIT(0x70 | cc);
1447 emit_near_disp(L);
1705 } else { 1448 } else {
1706 // 0000 1111 1000 tttn #32-bit disp 1449 // 0000 1111 1000 tttn #32-bit disp
1707 // Note: could eliminate cond. jumps to this jump if condition 1450 // Note: could eliminate cond. jumps to this jump if condition
1708 // is the same however, seems to be rather unlikely case. 1451 // is the same however, seems to be rather unlikely case.
1709 EMIT(0x0F); 1452 EMIT(0x0F);
1710 EMIT(0x80 | cc); 1453 EMIT(0x80 | cc);
1711 emit_disp(L, Displacement::OTHER); 1454 emit_disp(L, Displacement::OTHER);
1712 } 1455 }
1713 } 1456 }
1714 1457
1715 1458
1716 void Assembler::j(Condition cc, byte* entry, RelocInfo::Mode rmode, Hint hint) { 1459 void Assembler::j(Condition cc, byte* entry, RelocInfo::Mode rmode) {
1717 EnsureSpace ensure_space(this); 1460 EnsureSpace ensure_space(this);
1718 last_pc_ = pc_;
1719 ASSERT((0 <= cc) && (cc < 16)); 1461 ASSERT((0 <= cc) && (cc < 16));
1720 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
1721 // 0000 1111 1000 tttn #32-bit disp. 1462 // 0000 1111 1000 tttn #32-bit disp.
1722 EMIT(0x0F); 1463 EMIT(0x0F);
1723 EMIT(0x80 | cc); 1464 EMIT(0x80 | cc);
1724 emit(entry - (pc_ + sizeof(int32_t)), rmode); 1465 emit(entry - (pc_ + sizeof(int32_t)), rmode);
1725 } 1466 }
1726 1467
1727 1468
1728 void Assembler::j(Condition cc, Handle<Code> code, Hint hint) { 1469 void Assembler::j(Condition cc, Handle<Code> code) {
1729 EnsureSpace ensure_space(this); 1470 EnsureSpace ensure_space(this);
1730 last_pc_ = pc_;
1731 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
1732 // 0000 1111 1000 tttn #32-bit disp 1471 // 0000 1111 1000 tttn #32-bit disp
1733 EMIT(0x0F); 1472 EMIT(0x0F);
1734 EMIT(0x80 | cc); 1473 EMIT(0x80 | cc);
1735 emit(reinterpret_cast<intptr_t>(code.location()), RelocInfo::CODE_TARGET); 1474 emit(reinterpret_cast<intptr_t>(code.location()), RelocInfo::CODE_TARGET);
1736 } 1475 }
1737 1476
1738 1477
1739 void Assembler::j(Condition cc, NearLabel* L, Hint hint) {
1740 EnsureSpace ensure_space(this);
1741 last_pc_ = pc_;
1742 ASSERT(0 <= cc && cc < 16);
1743 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
1744 if (L->is_bound()) {
1745 const int short_size = 2;
1746 int offs = L->pos() - pc_offset();
1747 ASSERT(offs <= 0);
1748 ASSERT(is_int8(offs - short_size));
1749 // 0111 tttn #8-bit disp
1750 EMIT(0x70 | cc);
1751 EMIT((offs - short_size) & 0xFF);
1752 } else {
1753 EMIT(0x70 | cc);
1754 EMIT(0x00); // The displacement will be resolved later.
1755 L->link_to(pc_offset());
1756 }
1757 }
1758
1759
1760 // FPU instructions. 1478 // FPU instructions.
1761 1479
1762 void Assembler::fld(int i) { 1480 void Assembler::fld(int i) {
1763 EnsureSpace ensure_space(this); 1481 EnsureSpace ensure_space(this);
1764 last_pc_ = pc_;
1765 emit_farith(0xD9, 0xC0, i); 1482 emit_farith(0xD9, 0xC0, i);
1766 } 1483 }
1767 1484
1768 1485
1769 void Assembler::fstp(int i) { 1486 void Assembler::fstp(int i) {
1770 EnsureSpace ensure_space(this); 1487 EnsureSpace ensure_space(this);
1771 last_pc_ = pc_;
1772 emit_farith(0xDD, 0xD8, i); 1488 emit_farith(0xDD, 0xD8, i);
1773 } 1489 }
1774 1490
1775 1491
1776 void Assembler::fld1() { 1492 void Assembler::fld1() {
1777 EnsureSpace ensure_space(this); 1493 EnsureSpace ensure_space(this);
1778 last_pc_ = pc_;
1779 EMIT(0xD9); 1494 EMIT(0xD9);
1780 EMIT(0xE8); 1495 EMIT(0xE8);
1781 } 1496 }
1782 1497
1783 1498
1784 void Assembler::fldpi() { 1499 void Assembler::fldpi() {
1785 EnsureSpace ensure_space(this); 1500 EnsureSpace ensure_space(this);
1786 last_pc_ = pc_;
1787 EMIT(0xD9); 1501 EMIT(0xD9);
1788 EMIT(0xEB); 1502 EMIT(0xEB);
1789 } 1503 }
1790 1504
1791 1505
1792 void Assembler::fldz() { 1506 void Assembler::fldz() {
1793 EnsureSpace ensure_space(this); 1507 EnsureSpace ensure_space(this);
1794 last_pc_ = pc_;
1795 EMIT(0xD9); 1508 EMIT(0xD9);
1796 EMIT(0xEE); 1509 EMIT(0xEE);
1797 } 1510 }
1798 1511
1799 1512
1800 void Assembler::fldln2() { 1513 void Assembler::fldln2() {
1801 EnsureSpace ensure_space(this); 1514 EnsureSpace ensure_space(this);
1802 last_pc_ = pc_;
1803 EMIT(0xD9); 1515 EMIT(0xD9);
1804 EMIT(0xED); 1516 EMIT(0xED);
1805 } 1517 }
1806 1518
1807 1519
1808 void Assembler::fld_s(const Operand& adr) { 1520 void Assembler::fld_s(const Operand& adr) {
1809 EnsureSpace ensure_space(this); 1521 EnsureSpace ensure_space(this);
1810 last_pc_ = pc_;
1811 EMIT(0xD9); 1522 EMIT(0xD9);
1812 emit_operand(eax, adr); 1523 emit_operand(eax, adr);
1813 } 1524 }
1814 1525
1815 1526
1816 void Assembler::fld_d(const Operand& adr) { 1527 void Assembler::fld_d(const Operand& adr) {
1817 EnsureSpace ensure_space(this); 1528 EnsureSpace ensure_space(this);
1818 last_pc_ = pc_;
1819 EMIT(0xDD); 1529 EMIT(0xDD);
1820 emit_operand(eax, adr); 1530 emit_operand(eax, adr);
1821 } 1531 }
1822 1532
1823 1533
1824 void Assembler::fstp_s(const Operand& adr) { 1534 void Assembler::fstp_s(const Operand& adr) {
1825 EnsureSpace ensure_space(this); 1535 EnsureSpace ensure_space(this);
1826 last_pc_ = pc_;
1827 EMIT(0xD9); 1536 EMIT(0xD9);
1828 emit_operand(ebx, adr); 1537 emit_operand(ebx, adr);
1829 } 1538 }
1830 1539
1831 1540
1832 void Assembler::fstp_d(const Operand& adr) { 1541 void Assembler::fstp_d(const Operand& adr) {
1833 EnsureSpace ensure_space(this); 1542 EnsureSpace ensure_space(this);
1834 last_pc_ = pc_;
1835 EMIT(0xDD); 1543 EMIT(0xDD);
1836 emit_operand(ebx, adr); 1544 emit_operand(ebx, adr);
1837 } 1545 }
1838 1546
1839 1547
1840 void Assembler::fst_d(const Operand& adr) { 1548 void Assembler::fst_d(const Operand& adr) {
1841 EnsureSpace ensure_space(this); 1549 EnsureSpace ensure_space(this);
1842 last_pc_ = pc_;
1843 EMIT(0xDD); 1550 EMIT(0xDD);
1844 emit_operand(edx, adr); 1551 emit_operand(edx, adr);
1845 } 1552 }
1846 1553
1847 1554
1848 void Assembler::fild_s(const Operand& adr) { 1555 void Assembler::fild_s(const Operand& adr) {
1849 EnsureSpace ensure_space(this); 1556 EnsureSpace ensure_space(this);
1850 last_pc_ = pc_;
1851 EMIT(0xDB); 1557 EMIT(0xDB);
1852 emit_operand(eax, adr); 1558 emit_operand(eax, adr);
1853 } 1559 }
1854 1560
1855 1561
1856 void Assembler::fild_d(const Operand& adr) { 1562 void Assembler::fild_d(const Operand& adr) {
1857 EnsureSpace ensure_space(this); 1563 EnsureSpace ensure_space(this);
1858 last_pc_ = pc_;
1859 EMIT(0xDF); 1564 EMIT(0xDF);
1860 emit_operand(ebp, adr); 1565 emit_operand(ebp, adr);
1861 } 1566 }
1862 1567
1863 1568
1864 void Assembler::fistp_s(const Operand& adr) { 1569 void Assembler::fistp_s(const Operand& adr) {
1865 EnsureSpace ensure_space(this); 1570 EnsureSpace ensure_space(this);
1866 last_pc_ = pc_;
1867 EMIT(0xDB); 1571 EMIT(0xDB);
1868 emit_operand(ebx, adr); 1572 emit_operand(ebx, adr);
1869 } 1573 }
1870 1574
1871 1575
1872 void Assembler::fisttp_s(const Operand& adr) { 1576 void Assembler::fisttp_s(const Operand& adr) {
1873 ASSERT(CpuFeatures::IsEnabled(SSE3)); 1577 ASSERT(CpuFeatures::IsEnabled(SSE3));
1874 EnsureSpace ensure_space(this); 1578 EnsureSpace ensure_space(this);
1875 last_pc_ = pc_;
1876 EMIT(0xDB); 1579 EMIT(0xDB);
1877 emit_operand(ecx, adr); 1580 emit_operand(ecx, adr);
1878 } 1581 }
1879 1582
1880 1583
1881 void Assembler::fisttp_d(const Operand& adr) { 1584 void Assembler::fisttp_d(const Operand& adr) {
1882 ASSERT(CpuFeatures::IsEnabled(SSE3)); 1585 ASSERT(CpuFeatures::IsEnabled(SSE3));
1883 EnsureSpace ensure_space(this); 1586 EnsureSpace ensure_space(this);
1884 last_pc_ = pc_;
1885 EMIT(0xDD); 1587 EMIT(0xDD);
1886 emit_operand(ecx, adr); 1588 emit_operand(ecx, adr);
1887 } 1589 }
1888 1590
1889 1591
1890 void Assembler::fist_s(const Operand& adr) { 1592 void Assembler::fist_s(const Operand& adr) {
1891 EnsureSpace ensure_space(this); 1593 EnsureSpace ensure_space(this);
1892 last_pc_ = pc_;
1893 EMIT(0xDB); 1594 EMIT(0xDB);
1894 emit_operand(edx, adr); 1595 emit_operand(edx, adr);
1895 } 1596 }
1896 1597
1897 1598
1898 void Assembler::fistp_d(const Operand& adr) { 1599 void Assembler::fistp_d(const Operand& adr) {
1899 EnsureSpace ensure_space(this); 1600 EnsureSpace ensure_space(this);
1900 last_pc_ = pc_;
1901 EMIT(0xDF); 1601 EMIT(0xDF);
1902 emit_operand(edi, adr); 1602 emit_operand(edi, adr);
1903 } 1603 }
1904 1604
1905 1605
1906 void Assembler::fabs() { 1606 void Assembler::fabs() {
1907 EnsureSpace ensure_space(this); 1607 EnsureSpace ensure_space(this);
1908 last_pc_ = pc_;
1909 EMIT(0xD9); 1608 EMIT(0xD9);
1910 EMIT(0xE1); 1609 EMIT(0xE1);
1911 } 1610 }
1912 1611
1913 1612
1914 void Assembler::fchs() { 1613 void Assembler::fchs() {
1915 EnsureSpace ensure_space(this); 1614 EnsureSpace ensure_space(this);
1916 last_pc_ = pc_;
1917 EMIT(0xD9); 1615 EMIT(0xD9);
1918 EMIT(0xE0); 1616 EMIT(0xE0);
1919 } 1617 }
1920 1618
1921 1619
1922 void Assembler::fcos() { 1620 void Assembler::fcos() {
1923 EnsureSpace ensure_space(this); 1621 EnsureSpace ensure_space(this);
1924 last_pc_ = pc_;
1925 EMIT(0xD9); 1622 EMIT(0xD9);
1926 EMIT(0xFF); 1623 EMIT(0xFF);
1927 } 1624 }
1928 1625
1929 1626
1930 void Assembler::fsin() { 1627 void Assembler::fsin() {
1931 EnsureSpace ensure_space(this); 1628 EnsureSpace ensure_space(this);
1932 last_pc_ = pc_;
1933 EMIT(0xD9); 1629 EMIT(0xD9);
1934 EMIT(0xFE); 1630 EMIT(0xFE);
1935 } 1631 }
1936 1632
1937 1633
1938 void Assembler::fyl2x() { 1634 void Assembler::fyl2x() {
1939 EnsureSpace ensure_space(this); 1635 EnsureSpace ensure_space(this);
1940 last_pc_ = pc_;
1941 EMIT(0xD9); 1636 EMIT(0xD9);
1942 EMIT(0xF1); 1637 EMIT(0xF1);
1943 } 1638 }
1944 1639
1945 1640
1946 void Assembler::fadd(int i) { 1641 void Assembler::fadd(int i) {
1947 EnsureSpace ensure_space(this); 1642 EnsureSpace ensure_space(this);
1948 last_pc_ = pc_;
1949 emit_farith(0xDC, 0xC0, i); 1643 emit_farith(0xDC, 0xC0, i);
1950 } 1644 }
1951 1645
1952 1646
1953 void Assembler::fsub(int i) { 1647 void Assembler::fsub(int i) {
1954 EnsureSpace ensure_space(this); 1648 EnsureSpace ensure_space(this);
1955 last_pc_ = pc_;
1956 emit_farith(0xDC, 0xE8, i); 1649 emit_farith(0xDC, 0xE8, i);
1957 } 1650 }
1958 1651
1959 1652
1960 void Assembler::fisub_s(const Operand& adr) { 1653 void Assembler::fisub_s(const Operand& adr) {
1961 EnsureSpace ensure_space(this); 1654 EnsureSpace ensure_space(this);
1962 last_pc_ = pc_;
1963 EMIT(0xDA); 1655 EMIT(0xDA);
1964 emit_operand(esp, adr); 1656 emit_operand(esp, adr);
1965 } 1657 }
1966 1658
1967 1659
1968 void Assembler::fmul(int i) { 1660 void Assembler::fmul(int i) {
1969 EnsureSpace ensure_space(this); 1661 EnsureSpace ensure_space(this);
1970 last_pc_ = pc_;
1971 emit_farith(0xDC, 0xC8, i); 1662 emit_farith(0xDC, 0xC8, i);
1972 } 1663 }
1973 1664
1974 1665
1975 void Assembler::fdiv(int i) { 1666 void Assembler::fdiv(int i) {
1976 EnsureSpace ensure_space(this); 1667 EnsureSpace ensure_space(this);
1977 last_pc_ = pc_;
1978 emit_farith(0xDC, 0xF8, i); 1668 emit_farith(0xDC, 0xF8, i);
1979 } 1669 }
1980 1670
1981 1671
1982 void Assembler::faddp(int i) { 1672 void Assembler::faddp(int i) {
1983 EnsureSpace ensure_space(this); 1673 EnsureSpace ensure_space(this);
1984 last_pc_ = pc_;
1985 emit_farith(0xDE, 0xC0, i); 1674 emit_farith(0xDE, 0xC0, i);
1986 } 1675 }
1987 1676
1988 1677
1989 void Assembler::fsubp(int i) { 1678 void Assembler::fsubp(int i) {
1990 EnsureSpace ensure_space(this); 1679 EnsureSpace ensure_space(this);
1991 last_pc_ = pc_;
1992 emit_farith(0xDE, 0xE8, i); 1680 emit_farith(0xDE, 0xE8, i);
1993 } 1681 }
1994 1682
1995 1683
1996 void Assembler::fsubrp(int i) { 1684 void Assembler::fsubrp(int i) {
1997 EnsureSpace ensure_space(this); 1685 EnsureSpace ensure_space(this);
1998 last_pc_ = pc_;
1999 emit_farith(0xDE, 0xE0, i); 1686 emit_farith(0xDE, 0xE0, i);
2000 } 1687 }
2001 1688
2002 1689
2003 void Assembler::fmulp(int i) { 1690 void Assembler::fmulp(int i) {
2004 EnsureSpace ensure_space(this); 1691 EnsureSpace ensure_space(this);
2005 last_pc_ = pc_;
2006 emit_farith(0xDE, 0xC8, i); 1692 emit_farith(0xDE, 0xC8, i);
2007 } 1693 }
2008 1694
2009 1695
2010 void Assembler::fdivp(int i) { 1696 void Assembler::fdivp(int i) {
2011 EnsureSpace ensure_space(this); 1697 EnsureSpace ensure_space(this);
2012 last_pc_ = pc_;
2013 emit_farith(0xDE, 0xF8, i); 1698 emit_farith(0xDE, 0xF8, i);
2014 } 1699 }
2015 1700
2016 1701
2017 void Assembler::fprem() { 1702 void Assembler::fprem() {
2018 EnsureSpace ensure_space(this); 1703 EnsureSpace ensure_space(this);
2019 last_pc_ = pc_;
2020 EMIT(0xD9); 1704 EMIT(0xD9);
2021 EMIT(0xF8); 1705 EMIT(0xF8);
2022 } 1706 }
2023 1707
2024 1708
2025 void Assembler::fprem1() { 1709 void Assembler::fprem1() {
2026 EnsureSpace ensure_space(this); 1710 EnsureSpace ensure_space(this);
2027 last_pc_ = pc_;
2028 EMIT(0xD9); 1711 EMIT(0xD9);
2029 EMIT(0xF5); 1712 EMIT(0xF5);
2030 } 1713 }
2031 1714
2032 1715
2033 void Assembler::fxch(int i) { 1716 void Assembler::fxch(int i) {
2034 EnsureSpace ensure_space(this); 1717 EnsureSpace ensure_space(this);
2035 last_pc_ = pc_;
2036 emit_farith(0xD9, 0xC8, i); 1718 emit_farith(0xD9, 0xC8, i);
2037 } 1719 }
2038 1720
2039 1721
2040 void Assembler::fincstp() { 1722 void Assembler::fincstp() {
2041 EnsureSpace ensure_space(this); 1723 EnsureSpace ensure_space(this);
2042 last_pc_ = pc_;
2043 EMIT(0xD9); 1724 EMIT(0xD9);
2044 EMIT(0xF7); 1725 EMIT(0xF7);
2045 } 1726 }
2046 1727
2047 1728
2048 void Assembler::ffree(int i) { 1729 void Assembler::ffree(int i) {
2049 EnsureSpace ensure_space(this); 1730 EnsureSpace ensure_space(this);
2050 last_pc_ = pc_;
2051 emit_farith(0xDD, 0xC0, i); 1731 emit_farith(0xDD, 0xC0, i);
2052 } 1732 }
2053 1733
2054 1734
2055 void Assembler::ftst() { 1735 void Assembler::ftst() {
2056 EnsureSpace ensure_space(this); 1736 EnsureSpace ensure_space(this);
2057 last_pc_ = pc_;
2058 EMIT(0xD9); 1737 EMIT(0xD9);
2059 EMIT(0xE4); 1738 EMIT(0xE4);
2060 } 1739 }
2061 1740
2062 1741
2063 void Assembler::fucomp(int i) { 1742 void Assembler::fucomp(int i) {
2064 EnsureSpace ensure_space(this); 1743 EnsureSpace ensure_space(this);
2065 last_pc_ = pc_;
2066 emit_farith(0xDD, 0xE8, i); 1744 emit_farith(0xDD, 0xE8, i);
2067 } 1745 }
2068 1746
2069 1747
2070 void Assembler::fucompp() { 1748 void Assembler::fucompp() {
2071 EnsureSpace ensure_space(this); 1749 EnsureSpace ensure_space(this);
2072 last_pc_ = pc_;
2073 EMIT(0xDA); 1750 EMIT(0xDA);
2074 EMIT(0xE9); 1751 EMIT(0xE9);
2075 } 1752 }
2076 1753
2077 1754
2078 void Assembler::fucomi(int i) { 1755 void Assembler::fucomi(int i) {
2079 EnsureSpace ensure_space(this); 1756 EnsureSpace ensure_space(this);
2080 last_pc_ = pc_;
2081 EMIT(0xDB); 1757 EMIT(0xDB);
2082 EMIT(0xE8 + i); 1758 EMIT(0xE8 + i);
2083 } 1759 }
2084 1760
2085 1761
2086 void Assembler::fucomip() { 1762 void Assembler::fucomip() {
2087 EnsureSpace ensure_space(this); 1763 EnsureSpace ensure_space(this);
2088 last_pc_ = pc_;
2089 EMIT(0xDF); 1764 EMIT(0xDF);
2090 EMIT(0xE9); 1765 EMIT(0xE9);
2091 } 1766 }
2092 1767
2093 1768
2094 void Assembler::fcompp() { 1769 void Assembler::fcompp() {
2095 EnsureSpace ensure_space(this); 1770 EnsureSpace ensure_space(this);
2096 last_pc_ = pc_;
2097 EMIT(0xDE); 1771 EMIT(0xDE);
2098 EMIT(0xD9); 1772 EMIT(0xD9);
2099 } 1773 }
2100 1774
2101 1775
2102 void Assembler::fnstsw_ax() { 1776 void Assembler::fnstsw_ax() {
2103 EnsureSpace ensure_space(this); 1777 EnsureSpace ensure_space(this);
2104 last_pc_ = pc_;
2105 EMIT(0xDF); 1778 EMIT(0xDF);
2106 EMIT(0xE0); 1779 EMIT(0xE0);
2107 } 1780 }
2108 1781
2109 1782
2110 void Assembler::fwait() { 1783 void Assembler::fwait() {
2111 EnsureSpace ensure_space(this); 1784 EnsureSpace ensure_space(this);
2112 last_pc_ = pc_;
2113 EMIT(0x9B); 1785 EMIT(0x9B);
2114 } 1786 }
2115 1787
2116 1788
2117 void Assembler::frndint() { 1789 void Assembler::frndint() {
2118 EnsureSpace ensure_space(this); 1790 EnsureSpace ensure_space(this);
2119 last_pc_ = pc_;
2120 EMIT(0xD9); 1791 EMIT(0xD9);
2121 EMIT(0xFC); 1792 EMIT(0xFC);
2122 } 1793 }
2123 1794
2124 1795
2125 void Assembler::fnclex() { 1796 void Assembler::fnclex() {
2126 EnsureSpace ensure_space(this); 1797 EnsureSpace ensure_space(this);
2127 last_pc_ = pc_;
2128 EMIT(0xDB); 1798 EMIT(0xDB);
2129 EMIT(0xE2); 1799 EMIT(0xE2);
2130 } 1800 }
2131 1801
2132 1802
2133 void Assembler::sahf() { 1803 void Assembler::sahf() {
2134 EnsureSpace ensure_space(this); 1804 EnsureSpace ensure_space(this);
2135 last_pc_ = pc_;
2136 EMIT(0x9E); 1805 EMIT(0x9E);
2137 } 1806 }
2138 1807
2139 1808
2140 void Assembler::setcc(Condition cc, Register reg) { 1809 void Assembler::setcc(Condition cc, Register reg) {
2141 ASSERT(reg.is_byte_register()); 1810 ASSERT(reg.is_byte_register());
2142 EnsureSpace ensure_space(this); 1811 EnsureSpace ensure_space(this);
2143 last_pc_ = pc_;
2144 EMIT(0x0F); 1812 EMIT(0x0F);
2145 EMIT(0x90 | cc); 1813 EMIT(0x90 | cc);
2146 EMIT(0xC0 | reg.code()); 1814 EMIT(0xC0 | reg.code());
2147 } 1815 }
2148 1816
2149 1817
2150 void Assembler::cvttss2si(Register dst, const Operand& src) { 1818 void Assembler::cvttss2si(Register dst, const Operand& src) {
2151 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1819 ASSERT(CpuFeatures::IsEnabled(SSE2));
2152 EnsureSpace ensure_space(this); 1820 EnsureSpace ensure_space(this);
2153 last_pc_ = pc_;
2154 EMIT(0xF3); 1821 EMIT(0xF3);
2155 EMIT(0x0F); 1822 EMIT(0x0F);
2156 EMIT(0x2C); 1823 EMIT(0x2C);
2157 emit_operand(dst, src); 1824 emit_operand(dst, src);
2158 } 1825 }
2159 1826
2160 1827
2161 void Assembler::cvttsd2si(Register dst, const Operand& src) { 1828 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2162 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1829 ASSERT(CpuFeatures::IsEnabled(SSE2));
2163 EnsureSpace ensure_space(this); 1830 EnsureSpace ensure_space(this);
2164 last_pc_ = pc_;
2165 EMIT(0xF2); 1831 EMIT(0xF2);
2166 EMIT(0x0F); 1832 EMIT(0x0F);
2167 EMIT(0x2C); 1833 EMIT(0x2C);
2168 emit_operand(dst, src); 1834 emit_operand(dst, src);
2169 } 1835 }
2170 1836
2171 1837
2172 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) { 1838 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2173 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1839 ASSERT(CpuFeatures::IsEnabled(SSE2));
2174 EnsureSpace ensure_space(this); 1840 EnsureSpace ensure_space(this);
2175 last_pc_ = pc_;
2176 EMIT(0xF2); 1841 EMIT(0xF2);
2177 EMIT(0x0F); 1842 EMIT(0x0F);
2178 EMIT(0x2A); 1843 EMIT(0x2A);
2179 emit_sse_operand(dst, src); 1844 emit_sse_operand(dst, src);
2180 } 1845 }
2181 1846
2182 1847
2183 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { 1848 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
2184 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1849 ASSERT(CpuFeatures::IsEnabled(SSE2));
2185 EnsureSpace ensure_space(this); 1850 EnsureSpace ensure_space(this);
2186 last_pc_ = pc_;
2187 EMIT(0xF3); 1851 EMIT(0xF3);
2188 EMIT(0x0F); 1852 EMIT(0x0F);
2189 EMIT(0x5A); 1853 EMIT(0x5A);
2190 emit_sse_operand(dst, src); 1854 emit_sse_operand(dst, src);
2191 } 1855 }
2192 1856
2193 1857
2194 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { 1858 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
2195 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1859 ASSERT(CpuFeatures::IsEnabled(SSE2));
2196 EnsureSpace ensure_space(this); 1860 EnsureSpace ensure_space(this);
2197 last_pc_ = pc_;
2198 EMIT(0xF2); 1861 EMIT(0xF2);
2199 EMIT(0x0F); 1862 EMIT(0x0F);
2200 EMIT(0x5A); 1863 EMIT(0x5A);
2201 emit_sse_operand(dst, src); 1864 emit_sse_operand(dst, src);
2202 } 1865 }
2203 1866
2204 1867
2205 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 1868 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
2206 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1869 ASSERT(CpuFeatures::IsEnabled(SSE2));
2207 EnsureSpace ensure_space(this); 1870 EnsureSpace ensure_space(this);
2208 last_pc_ = pc_;
2209 EMIT(0xF2); 1871 EMIT(0xF2);
2210 EMIT(0x0F); 1872 EMIT(0x0F);
2211 EMIT(0x58); 1873 EMIT(0x58);
2212 emit_sse_operand(dst, src); 1874 emit_sse_operand(dst, src);
2213 } 1875 }
2214 1876
2215 1877
2216 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 1878 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
2217 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1879 ASSERT(CpuFeatures::IsEnabled(SSE2));
2218 EnsureSpace ensure_space(this); 1880 EnsureSpace ensure_space(this);
2219 last_pc_ = pc_;
2220 EMIT(0xF2); 1881 EMIT(0xF2);
2221 EMIT(0x0F); 1882 EMIT(0x0F);
2222 EMIT(0x59); 1883 EMIT(0x59);
2223 emit_sse_operand(dst, src); 1884 emit_sse_operand(dst, src);
2224 } 1885 }
2225 1886
2226 1887
2227 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 1888 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
2228 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1889 ASSERT(CpuFeatures::IsEnabled(SSE2));
2229 EnsureSpace ensure_space(this); 1890 EnsureSpace ensure_space(this);
2230 last_pc_ = pc_;
2231 EMIT(0xF2); 1891 EMIT(0xF2);
2232 EMIT(0x0F); 1892 EMIT(0x0F);
2233 EMIT(0x5C); 1893 EMIT(0x5C);
2234 emit_sse_operand(dst, src); 1894 emit_sse_operand(dst, src);
2235 } 1895 }
2236 1896
2237 1897
2238 void Assembler::divsd(XMMRegister dst, XMMRegister src) { 1898 void Assembler::divsd(XMMRegister dst, XMMRegister src) {
2239 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1899 ASSERT(CpuFeatures::IsEnabled(SSE2));
2240 EnsureSpace ensure_space(this); 1900 EnsureSpace ensure_space(this);
2241 last_pc_ = pc_;
2242 EMIT(0xF2); 1901 EMIT(0xF2);
2243 EMIT(0x0F); 1902 EMIT(0x0F);
2244 EMIT(0x5E); 1903 EMIT(0x5E);
2245 emit_sse_operand(dst, src); 1904 emit_sse_operand(dst, src);
2246 } 1905 }
2247 1906
2248 1907
2249 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 1908 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2250 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1909 ASSERT(CpuFeatures::IsEnabled(SSE2));
2251 EnsureSpace ensure_space(this); 1910 EnsureSpace ensure_space(this);
2252 last_pc_ = pc_;
2253 EMIT(0x66); 1911 EMIT(0x66);
2254 EMIT(0x0F); 1912 EMIT(0x0F);
2255 EMIT(0x57); 1913 EMIT(0x57);
2256 emit_sse_operand(dst, src); 1914 emit_sse_operand(dst, src);
2257 } 1915 }
2258 1916
2259 1917
2260 void Assembler::xorps(XMMRegister dst, XMMRegister src) { 1918 void Assembler::xorps(XMMRegister dst, XMMRegister src) {
2261 EnsureSpace ensure_space(this); 1919 EnsureSpace ensure_space(this);
2262 last_pc_ = pc_;
2263 EMIT(0x0F); 1920 EMIT(0x0F);
2264 EMIT(0x57); 1921 EMIT(0x57);
2265 emit_sse_operand(dst, src); 1922 emit_sse_operand(dst, src);
2266 } 1923 }
2267 1924
2268 1925
2269 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 1926 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
2270 EnsureSpace ensure_space(this); 1927 EnsureSpace ensure_space(this);
2271 last_pc_ = pc_;
2272 EMIT(0xF2); 1928 EMIT(0xF2);
2273 EMIT(0x0F); 1929 EMIT(0x0F);
2274 EMIT(0x51); 1930 EMIT(0x51);
2275 emit_sse_operand(dst, src); 1931 emit_sse_operand(dst, src);
2276 } 1932 }
2277 1933
2278 1934
2279 void Assembler::andpd(XMMRegister dst, XMMRegister src) { 1935 void Assembler::andpd(XMMRegister dst, XMMRegister src) {
2280 EnsureSpace ensure_space(this); 1936 EnsureSpace ensure_space(this);
2281 last_pc_ = pc_;
2282 EMIT(0x66); 1937 EMIT(0x66);
2283 EMIT(0x0F); 1938 EMIT(0x0F);
2284 EMIT(0x54); 1939 EMIT(0x54);
2285 emit_sse_operand(dst, src); 1940 emit_sse_operand(dst, src);
2286 } 1941 }
2287 1942
2288 1943
2289 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 1944 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2290 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1945 ASSERT(CpuFeatures::IsEnabled(SSE2));
2291 EnsureSpace ensure_space(this); 1946 EnsureSpace ensure_space(this);
2292 last_pc_ = pc_;
2293 EMIT(0x66); 1947 EMIT(0x66);
2294 EMIT(0x0F); 1948 EMIT(0x0F);
2295 EMIT(0x2E); 1949 EMIT(0x2E);
2296 emit_sse_operand(dst, src); 1950 emit_sse_operand(dst, src);
2297 } 1951 }
2298 1952
2299 1953
2300 void Assembler::movmskpd(Register dst, XMMRegister src) { 1954 void Assembler::movmskpd(Register dst, XMMRegister src) {
2301 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1955 ASSERT(CpuFeatures::IsEnabled(SSE2));
2302 EnsureSpace ensure_space(this); 1956 EnsureSpace ensure_space(this);
2303 last_pc_ = pc_;
2304 EMIT(0x66); 1957 EMIT(0x66);
2305 EMIT(0x0F); 1958 EMIT(0x0F);
2306 EMIT(0x50); 1959 EMIT(0x50);
2307 emit_sse_operand(dst, src); 1960 emit_sse_operand(dst, src);
2308 } 1961 }
2309 1962
2310 1963
2311 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { 1964 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
2312 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1965 ASSERT(CpuFeatures::IsEnabled(SSE2));
2313 EnsureSpace ensure_space(this); 1966 EnsureSpace ensure_space(this);
2314 last_pc_ = pc_;
2315 EMIT(0xF2); 1967 EMIT(0xF2);
2316 EMIT(0x0F); 1968 EMIT(0x0F);
2317 EMIT(0xC2); 1969 EMIT(0xC2);
2318 emit_sse_operand(dst, src); 1970 emit_sse_operand(dst, src);
2319 EMIT(1); // LT == 1 1971 EMIT(1); // LT == 1
2320 } 1972 }
2321 1973
2322 1974
2323 void Assembler::movaps(XMMRegister dst, XMMRegister src) { 1975 void Assembler::movaps(XMMRegister dst, XMMRegister src) {
2324 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1976 ASSERT(CpuFeatures::IsEnabled(SSE2));
2325 EnsureSpace ensure_space(this); 1977 EnsureSpace ensure_space(this);
2326 last_pc_ = pc_;
2327 EMIT(0x0F); 1978 EMIT(0x0F);
2328 EMIT(0x28); 1979 EMIT(0x28);
2329 emit_sse_operand(dst, src); 1980 emit_sse_operand(dst, src);
2330 } 1981 }
2331 1982
2332 1983
2333 void Assembler::movdqa(const Operand& dst, XMMRegister src) { 1984 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2334 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1985 ASSERT(CpuFeatures::IsEnabled(SSE2));
2335 EnsureSpace ensure_space(this); 1986 EnsureSpace ensure_space(this);
2336 last_pc_ = pc_;
2337 EMIT(0x66); 1987 EMIT(0x66);
2338 EMIT(0x0F); 1988 EMIT(0x0F);
2339 EMIT(0x7F); 1989 EMIT(0x7F);
2340 emit_sse_operand(src, dst); 1990 emit_sse_operand(src, dst);
2341 } 1991 }
2342 1992
2343 1993
2344 void Assembler::movdqa(XMMRegister dst, const Operand& src) { 1994 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2345 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1995 ASSERT(CpuFeatures::IsEnabled(SSE2));
2346 EnsureSpace ensure_space(this); 1996 EnsureSpace ensure_space(this);
2347 last_pc_ = pc_;
2348 EMIT(0x66); 1997 EMIT(0x66);
2349 EMIT(0x0F); 1998 EMIT(0x0F);
2350 EMIT(0x6F); 1999 EMIT(0x6F);
2351 emit_sse_operand(dst, src); 2000 emit_sse_operand(dst, src);
2352 } 2001 }
2353 2002
2354 2003
2355 void Assembler::movdqu(const Operand& dst, XMMRegister src ) { 2004 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2356 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2005 ASSERT(CpuFeatures::IsEnabled(SSE2));
2357 EnsureSpace ensure_space(this); 2006 EnsureSpace ensure_space(this);
2358 last_pc_ = pc_;
2359 EMIT(0xF3); 2007 EMIT(0xF3);
2360 EMIT(0x0F); 2008 EMIT(0x0F);
2361 EMIT(0x7F); 2009 EMIT(0x7F);
2362 emit_sse_operand(src, dst); 2010 emit_sse_operand(src, dst);
2363 } 2011 }
2364 2012
2365 2013
2366 void Assembler::movdqu(XMMRegister dst, const Operand& src) { 2014 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2367 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2015 ASSERT(CpuFeatures::IsEnabled(SSE2));
2368 EnsureSpace ensure_space(this); 2016 EnsureSpace ensure_space(this);
2369 last_pc_ = pc_;
2370 EMIT(0xF3); 2017 EMIT(0xF3);
2371 EMIT(0x0F); 2018 EMIT(0x0F);
2372 EMIT(0x6F); 2019 EMIT(0x6F);
2373 emit_sse_operand(dst, src); 2020 emit_sse_operand(dst, src);
2374 } 2021 }
2375 2022
2376 2023
2377 void Assembler::movntdqa(XMMRegister dst, const Operand& src) { 2024 void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
2378 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2025 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2379 EnsureSpace ensure_space(this); 2026 EnsureSpace ensure_space(this);
2380 last_pc_ = pc_;
2381 EMIT(0x66); 2027 EMIT(0x66);
2382 EMIT(0x0F); 2028 EMIT(0x0F);
2383 EMIT(0x38); 2029 EMIT(0x38);
2384 EMIT(0x2A); 2030 EMIT(0x2A);
2385 emit_sse_operand(dst, src); 2031 emit_sse_operand(dst, src);
2386 } 2032 }
2387 2033
2388 2034
2389 void Assembler::movntdq(const Operand& dst, XMMRegister src) { 2035 void Assembler::movntdq(const Operand& dst, XMMRegister src) {
2390 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2036 ASSERT(CpuFeatures::IsEnabled(SSE2));
2391 EnsureSpace ensure_space(this); 2037 EnsureSpace ensure_space(this);
2392 last_pc_ = pc_;
2393 EMIT(0x66); 2038 EMIT(0x66);
2394 EMIT(0x0F); 2039 EMIT(0x0F);
2395 EMIT(0xE7); 2040 EMIT(0xE7);
2396 emit_sse_operand(src, dst); 2041 emit_sse_operand(src, dst);
2397 } 2042 }
2398 2043
2399 2044
2400 void Assembler::prefetch(const Operand& src, int level) { 2045 void Assembler::prefetch(const Operand& src, int level) {
2401 ASSERT(is_uint2(level)); 2046 ASSERT(is_uint2(level));
2402 EnsureSpace ensure_space(this); 2047 EnsureSpace ensure_space(this);
2403 last_pc_ = pc_;
2404 EMIT(0x0F); 2048 EMIT(0x0F);
2405 EMIT(0x18); 2049 EMIT(0x18);
2406 XMMRegister code = { level }; // Emit hint number in Reg position of RegR/M. 2050 XMMRegister code = { level }; // Emit hint number in Reg position of RegR/M.
2407 emit_sse_operand(code, src); 2051 emit_sse_operand(code, src);
2408 } 2052 }
2409 2053
2410 2054
2411 void Assembler::movdbl(XMMRegister dst, const Operand& src) { 2055 void Assembler::movdbl(XMMRegister dst, const Operand& src) {
2412 EnsureSpace ensure_space(this); 2056 EnsureSpace ensure_space(this);
2413 last_pc_ = pc_;
2414 movsd(dst, src); 2057 movsd(dst, src);
2415 } 2058 }
2416 2059
2417 2060
2418 void Assembler::movdbl(const Operand& dst, XMMRegister src) { 2061 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2419 EnsureSpace ensure_space(this); 2062 EnsureSpace ensure_space(this);
2420 last_pc_ = pc_;
2421 movsd(dst, src); 2063 movsd(dst, src);
2422 } 2064 }
2423 2065
2424 2066
2425 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2067 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2426 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2068 ASSERT(CpuFeatures::IsEnabled(SSE2));
2427 EnsureSpace ensure_space(this); 2069 EnsureSpace ensure_space(this);
2428 last_pc_ = pc_;
2429 EMIT(0xF2); // double 2070 EMIT(0xF2); // double
2430 EMIT(0x0F); 2071 EMIT(0x0F);
2431 EMIT(0x11); // store 2072 EMIT(0x11); // store
2432 emit_sse_operand(src, dst); 2073 emit_sse_operand(src, dst);
2433 } 2074 }
2434 2075
2435 2076
2436 void Assembler::movsd(XMMRegister dst, const Operand& src) { 2077 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2437 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2078 ASSERT(CpuFeatures::IsEnabled(SSE2));
2438 EnsureSpace ensure_space(this); 2079 EnsureSpace ensure_space(this);
2439 last_pc_ = pc_;
2440 EMIT(0xF2); // double 2080 EMIT(0xF2); // double
2441 EMIT(0x0F); 2081 EMIT(0x0F);
2442 EMIT(0x10); // load 2082 EMIT(0x10); // load
2443 emit_sse_operand(dst, src); 2083 emit_sse_operand(dst, src);
2444 } 2084 }
2445 2085
2446 2086
2447 void Assembler::movsd(XMMRegister dst, XMMRegister src) { 2087 void Assembler::movsd(XMMRegister dst, XMMRegister src) {
2448 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2088 ASSERT(CpuFeatures::IsEnabled(SSE2));
2449 EnsureSpace ensure_space(this); 2089 EnsureSpace ensure_space(this);
2450 last_pc_ = pc_;
2451 EMIT(0xF2); 2090 EMIT(0xF2);
2452 EMIT(0x0F); 2091 EMIT(0x0F);
2453 EMIT(0x10); 2092 EMIT(0x10);
2454 emit_sse_operand(dst, src); 2093 emit_sse_operand(dst, src);
2455 } 2094 }
2456 2095
2457 2096
2458 void Assembler::movss(const Operand& dst, XMMRegister src ) { 2097 void Assembler::movss(const Operand& dst, XMMRegister src ) {
2459 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2098 ASSERT(CpuFeatures::IsEnabled(SSE2));
2460 EnsureSpace ensure_space(this); 2099 EnsureSpace ensure_space(this);
2461 last_pc_ = pc_;
2462 EMIT(0xF3); // float 2100 EMIT(0xF3); // float
2463 EMIT(0x0F); 2101 EMIT(0x0F);
2464 EMIT(0x11); // store 2102 EMIT(0x11); // store
2465 emit_sse_operand(src, dst); 2103 emit_sse_operand(src, dst);
2466 } 2104 }
2467 2105
2468 2106
2469 void Assembler::movss(XMMRegister dst, const Operand& src) { 2107 void Assembler::movss(XMMRegister dst, const Operand& src) {
2470 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2108 ASSERT(CpuFeatures::IsEnabled(SSE2));
2471 EnsureSpace ensure_space(this); 2109 EnsureSpace ensure_space(this);
2472 last_pc_ = pc_;
2473 EMIT(0xF3); // float 2110 EMIT(0xF3); // float
2474 EMIT(0x0F); 2111 EMIT(0x0F);
2475 EMIT(0x10); // load 2112 EMIT(0x10); // load
2476 emit_sse_operand(dst, src); 2113 emit_sse_operand(dst, src);
2477 } 2114 }
2478 2115
2479 2116
2480 void Assembler::movss(XMMRegister dst, XMMRegister src) { 2117 void Assembler::movss(XMMRegister dst, XMMRegister src) {
2481 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2118 ASSERT(CpuFeatures::IsEnabled(SSE2));
2482 EnsureSpace ensure_space(this); 2119 EnsureSpace ensure_space(this);
2483 last_pc_ = pc_;
2484 EMIT(0xF3); 2120 EMIT(0xF3);
2485 EMIT(0x0F); 2121 EMIT(0x0F);
2486 EMIT(0x10); 2122 EMIT(0x10);
2487 emit_sse_operand(dst, src); 2123 emit_sse_operand(dst, src);
2488 } 2124 }
2489 2125
2490 2126
2491 void Assembler::movd(XMMRegister dst, const Operand& src) { 2127 void Assembler::movd(XMMRegister dst, const Operand& src) {
2492 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2128 ASSERT(CpuFeatures::IsEnabled(SSE2));
2493 EnsureSpace ensure_space(this); 2129 EnsureSpace ensure_space(this);
2494 last_pc_ = pc_;
2495 EMIT(0x66); 2130 EMIT(0x66);
2496 EMIT(0x0F); 2131 EMIT(0x0F);
2497 EMIT(0x6E); 2132 EMIT(0x6E);
2498 emit_sse_operand(dst, src); 2133 emit_sse_operand(dst, src);
2499 } 2134 }
2500 2135
2501 2136
2502 void Assembler::movd(const Operand& dst, XMMRegister src) { 2137 void Assembler::movd(const Operand& dst, XMMRegister src) {
2503 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2138 ASSERT(CpuFeatures::IsEnabled(SSE2));
2504 EnsureSpace ensure_space(this); 2139 EnsureSpace ensure_space(this);
2505 last_pc_ = pc_;
2506 EMIT(0x66); 2140 EMIT(0x66);
2507 EMIT(0x0F); 2141 EMIT(0x0F);
2508 EMIT(0x7E); 2142 EMIT(0x7E);
2509 emit_sse_operand(src, dst); 2143 emit_sse_operand(src, dst);
2510 } 2144 }
2511 2145
2512 2146
2513 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2147 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2514 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2148 ASSERT(CpuFeatures::IsEnabled(SSE2));
2515 EnsureSpace ensure_space(this); 2149 EnsureSpace ensure_space(this);
2516 last_pc_ = pc_;
2517 EMIT(0x66); 2150 EMIT(0x66);
2518 EMIT(0x0F); 2151 EMIT(0x0F);
2519 EMIT(0xDB); 2152 EMIT(0xDB);
2520 emit_sse_operand(dst, src); 2153 emit_sse_operand(dst, src);
2521 } 2154 }
2522 2155
2523 2156
2524 void Assembler::pxor(XMMRegister dst, XMMRegister src) { 2157 void Assembler::pxor(XMMRegister dst, XMMRegister src) {
2525 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2158 ASSERT(CpuFeatures::IsEnabled(SSE2));
2526 EnsureSpace ensure_space(this); 2159 EnsureSpace ensure_space(this);
2527 last_pc_ = pc_;
2528 EMIT(0x66); 2160 EMIT(0x66);
2529 EMIT(0x0F); 2161 EMIT(0x0F);
2530 EMIT(0xEF); 2162 EMIT(0xEF);
2531 emit_sse_operand(dst, src); 2163 emit_sse_operand(dst, src);
2532 } 2164 }
2533 2165
2534 2166
2535 void Assembler::por(XMMRegister dst, XMMRegister src) { 2167 void Assembler::por(XMMRegister dst, XMMRegister src) {
2536 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2168 ASSERT(CpuFeatures::IsEnabled(SSE2));
2537 EnsureSpace ensure_space(this); 2169 EnsureSpace ensure_space(this);
2538 last_pc_ = pc_;
2539 EMIT(0x66); 2170 EMIT(0x66);
2540 EMIT(0x0F); 2171 EMIT(0x0F);
2541 EMIT(0xEB); 2172 EMIT(0xEB);
2542 emit_sse_operand(dst, src); 2173 emit_sse_operand(dst, src);
2543 } 2174 }
2544 2175
2545 2176
2546 void Assembler::ptest(XMMRegister dst, XMMRegister src) { 2177 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
2547 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2178 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2548 EnsureSpace ensure_space(this); 2179 EnsureSpace ensure_space(this);
2549 last_pc_ = pc_;
2550 EMIT(0x66); 2180 EMIT(0x66);
2551 EMIT(0x0F); 2181 EMIT(0x0F);
2552 EMIT(0x38); 2182 EMIT(0x38);
2553 EMIT(0x17); 2183 EMIT(0x17);
2554 emit_sse_operand(dst, src); 2184 emit_sse_operand(dst, src);
2555 } 2185 }
2556 2186
2557 2187
2558 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2188 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2559 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2189 ASSERT(CpuFeatures::IsEnabled(SSE2));
2560 EnsureSpace ensure_space(this); 2190 EnsureSpace ensure_space(this);
2561 last_pc_ = pc_;
2562 EMIT(0x66); 2191 EMIT(0x66);
2563 EMIT(0x0F); 2192 EMIT(0x0F);
2564 EMIT(0x73); 2193 EMIT(0x73);
2565 emit_sse_operand(esi, reg); // esi == 6 2194 emit_sse_operand(esi, reg); // esi == 6
2566 EMIT(shift); 2195 EMIT(shift);
2567 } 2196 }
2568 2197
2569 2198
2570 void Assembler::psllq(XMMRegister dst, XMMRegister src) { 2199 void Assembler::psllq(XMMRegister dst, XMMRegister src) {
2571 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2200 ASSERT(CpuFeatures::IsEnabled(SSE2));
2572 EnsureSpace ensure_space(this); 2201 EnsureSpace ensure_space(this);
2573 last_pc_ = pc_;
2574 EMIT(0x66); 2202 EMIT(0x66);
2575 EMIT(0x0F); 2203 EMIT(0x0F);
2576 EMIT(0xF3); 2204 EMIT(0xF3);
2577 emit_sse_operand(dst, src); 2205 emit_sse_operand(dst, src);
2578 } 2206 }
2579 2207
2580 2208
2581 void Assembler::psrlq(XMMRegister reg, int8_t shift) { 2209 void Assembler::psrlq(XMMRegister reg, int8_t shift) {
2582 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2210 ASSERT(CpuFeatures::IsEnabled(SSE2));
2583 EnsureSpace ensure_space(this); 2211 EnsureSpace ensure_space(this);
2584 last_pc_ = pc_;
2585 EMIT(0x66); 2212 EMIT(0x66);
2586 EMIT(0x0F); 2213 EMIT(0x0F);
2587 EMIT(0x73); 2214 EMIT(0x73);
2588 emit_sse_operand(edx, reg); // edx == 2 2215 emit_sse_operand(edx, reg); // edx == 2
2589 EMIT(shift); 2216 EMIT(shift);
2590 } 2217 }
2591 2218
2592 2219
2593 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2220 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2594 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2221 ASSERT(CpuFeatures::IsEnabled(SSE2));
2595 EnsureSpace ensure_space(this); 2222 EnsureSpace ensure_space(this);
2596 last_pc_ = pc_;
2597 EMIT(0x66); 2223 EMIT(0x66);
2598 EMIT(0x0F); 2224 EMIT(0x0F);
2599 EMIT(0xD3); 2225 EMIT(0xD3);
2600 emit_sse_operand(dst, src); 2226 emit_sse_operand(dst, src);
2601 } 2227 }
2602 2228
2603 2229
2604 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2230 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
2605 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2231 ASSERT(CpuFeatures::IsEnabled(SSE2));
2606 EnsureSpace ensure_space(this); 2232 EnsureSpace ensure_space(this);
2607 last_pc_ = pc_;
2608 EMIT(0x66); 2233 EMIT(0x66);
2609 EMIT(0x0F); 2234 EMIT(0x0F);
2610 EMIT(0x70); 2235 EMIT(0x70);
2611 emit_sse_operand(dst, src); 2236 emit_sse_operand(dst, src);
2612 EMIT(shuffle); 2237 EMIT(shuffle);
2613 } 2238 }
2614 2239
2615 2240
2616 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) { 2241 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2617 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2242 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2618 EnsureSpace ensure_space(this); 2243 EnsureSpace ensure_space(this);
2619 last_pc_ = pc_;
2620 EMIT(0x66); 2244 EMIT(0x66);
2621 EMIT(0x0F); 2245 EMIT(0x0F);
2622 EMIT(0x3A); 2246 EMIT(0x3A);
2623 EMIT(0x16); 2247 EMIT(0x16);
2624 emit_sse_operand(src, dst); 2248 emit_sse_operand(src, dst);
2625 EMIT(offset); 2249 EMIT(offset);
2626 } 2250 }
2627 2251
2628 2252
2629 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { 2253 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2630 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2254 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2631 EnsureSpace ensure_space(this); 2255 EnsureSpace ensure_space(this);
2632 last_pc_ = pc_;
2633 EMIT(0x66); 2256 EMIT(0x66);
2634 EMIT(0x0F); 2257 EMIT(0x0F);
2635 EMIT(0x3A); 2258 EMIT(0x3A);
2636 EMIT(0x22); 2259 EMIT(0x22);
2637 emit_sse_operand(dst, src); 2260 emit_sse_operand(dst, src);
2638 EMIT(offset); 2261 EMIT(offset);
2639 } 2262 }
2640 2263
2641 2264
2642 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { 2265 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
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2721 // Switch buffers. 2344 // Switch buffers.
2722 if (isolate()->assembler_spare_buffer() == NULL && 2345 if (isolate()->assembler_spare_buffer() == NULL &&
2723 buffer_size_ == kMinimalBufferSize) { 2346 buffer_size_ == kMinimalBufferSize) {
2724 isolate()->set_assembler_spare_buffer(buffer_); 2347 isolate()->set_assembler_spare_buffer(buffer_);
2725 } else { 2348 } else {
2726 DeleteArray(buffer_); 2349 DeleteArray(buffer_);
2727 } 2350 }
2728 buffer_ = desc.buffer; 2351 buffer_ = desc.buffer;
2729 buffer_size_ = desc.buffer_size; 2352 buffer_size_ = desc.buffer_size;
2730 pc_ += pc_delta; 2353 pc_ += pc_delta;
2731 if (last_pc_ != NULL) {
2732 last_pc_ += pc_delta;
2733 }
2734 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta, 2354 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
2735 reloc_info_writer.last_pc() + pc_delta); 2355 reloc_info_writer.last_pc() + pc_delta);
2736 2356
2737 // Relocate runtime entries. 2357 // Relocate runtime entries.
2738 for (RelocIterator it(desc); !it.done(); it.next()) { 2358 for (RelocIterator it(desc); !it.done(); it.next()) {
2739 RelocInfo::Mode rmode = it.rinfo()->rmode(); 2359 RelocInfo::Mode rmode = it.rinfo()->rmode();
2740 if (rmode == RelocInfo::RUNTIME_ENTRY) { 2360 if (rmode == RelocInfo::RUNTIME_ENTRY) {
2741 int32_t* p = reinterpret_cast<int32_t*>(it.rinfo()->pc()); 2361 int32_t* p = reinterpret_cast<int32_t*>(it.rinfo()->pc());
2742 *p -= pc_delta; // relocate entry 2362 *p -= pc_delta; // relocate entry
2743 } else if (rmode == RelocInfo::INTERNAL_REFERENCE) { 2363 } else if (rmode == RelocInfo::INTERNAL_REFERENCE) {
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2859 fprintf(coverage_log, "%s\n", file_line); 2479 fprintf(coverage_log, "%s\n", file_line);
2860 fflush(coverage_log); 2480 fflush(coverage_log);
2861 } 2481 }
2862 } 2482 }
2863 2483
2864 #endif 2484 #endif
2865 2485
2866 } } // namespace v8::internal 2486 } } // namespace v8::internal
2867 2487
2868 #endif // V8_TARGET_ARCH_IA32 2488 #endif // V8_TARGET_ARCH_IA32
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