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1 ; Simple test of the select instruction. The CHECK lines are only | 1 ; Simple test of the select instruction. The CHECK lines are only |
2 ; checking for basic instruction patterns that should be present | 2 ; checking for basic instruction patterns that should be present |
3 ; regardless of the optimization level, so there are no special OPTM1 | 3 ; regardless of the optimization level, so there are no special OPTM1 |
4 ; match lines. | 4 ; match lines. |
5 | 5 |
6 ; RUN: %p2i -i %s --args -O2 --verbose none \ | 6 ; RUN: %p2i -i %s --args -O2 --verbose none \ |
7 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | 7 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ |
8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | 8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
9 ; RUN: %p2i -i %s --args -Om1 --verbose none \ | 9 ; RUN: %p2i -i %s --args -Om1 --verbose none \ |
10 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | 10 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ |
11 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | 11 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
12 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s | |
13 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s | |
14 | 12 |
15 define void @testSelect(i32 %a, i32 %b) { | 13 define void @testSelect(i32 %a, i32 %b) { |
16 entry: | 14 entry: |
17 %cmp = icmp slt i32 %a, %b | 15 %cmp = icmp slt i32 %a, %b |
18 %cond = select i1 %cmp, i32 %a, i32 %b | 16 %cond = select i1 %cmp, i32 %a, i32 %b |
19 tail call void @useInt(i32 %cond) | 17 tail call void @useInt(i32 %cond) |
20 %cmp1 = icmp sgt i32 %a, %b | 18 %cmp1 = icmp sgt i32 %a, %b |
21 %cond2 = select i1 %cmp1, i32 10, i32 20 | 19 %cond2 = select i1 %cmp1, i32 10, i32 20 |
22 tail call void @useInt(i32 %cond2) | 20 tail call void @useInt(i32 %cond2) |
23 ret void | 21 ret void |
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53 ; Check for valid addressing mode in the cmp instruction when the | 51 ; Check for valid addressing mode in the cmp instruction when the |
54 ; operand is an immediate. There is a different x86-32 lowering | 52 ; operand is an immediate. There is a different x86-32 lowering |
55 ; sequence for 64-bit operands. | 53 ; sequence for 64-bit operands. |
56 define i64 @testSelectImm64(i64 %a, i64 %b) { | 54 define i64 @testSelectImm64(i64 %a, i64 %b) { |
57 entry: | 55 entry: |
58 %cond = select i1 true, i64 %a, i64 %b | 56 %cond = select i1 true, i64 %a, i64 %b |
59 ret i64 %cond | 57 ret i64 %cond |
60 } | 58 } |
61 ; CHECK-LABEL: testSelectImm64 | 59 ; CHECK-LABEL: testSelectImm64 |
62 ; CHECK-NOT: cmp {{[0-9]+}}, | 60 ; CHECK-NOT: cmp {{[0-9]+}}, |
63 | |
64 ; ERRORS-NOT: ICE translation error | |
65 ; DUMP-NOT: SZ | |
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