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Issue 704713003: [turbofan] Optimize add operations to use 'leal' instruction on x64 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Final version Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 234 matching lines...) Expand 10 before | Expand all | Expand 10 after
245 245
246 246
247 TEST_F(InstructionSelectorTest, Int32AddWithInt32AddWithParameters) { 247 TEST_F(InstructionSelectorTest, Int32AddWithInt32AddWithParameters) {
248 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32); 248 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
249 Node* const p0 = m.Parameter(0); 249 Node* const p0 = m.Parameter(0);
250 Node* const p1 = m.Parameter(1); 250 Node* const p1 = m.Parameter(1);
251 Node* const a0 = m.Int32Add(p0, p1); 251 Node* const a0 = m.Int32Add(p0, p1);
252 m.Return(m.Int32Add(a0, p0)); 252 m.Return(m.Int32Add(a0, p0));
253 Stream s = m.Build(); 253 Stream s = m.Build();
254 ASSERT_EQ(2U, s.size()); 254 ASSERT_EQ(2U, s.size());
255 EXPECT_EQ(kX64Add32, s[0]->arch_opcode()); 255 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
256 ASSERT_EQ(2U, s[0]->InputCount()); 256 ASSERT_EQ(2U, s[0]->InputCount());
257 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(0))); 257 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
258 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(1))); 258 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
259 } 259 }
260 260
261 261
262 TEST_F(InstructionSelectorTest, Int32AddConstantAsLea) {
263 StreamBuilder m(this, kMachInt32, kMachInt32);
264 Node* const p0 = m.Parameter(0);
265 Node* const c0 = m.Int32Constant(15);
266 m.Return(m.Int32Add(p0, c0));
267 Stream s = m.Build();
268 ASSERT_EQ(1U, s.size());
269 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
270 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
271 ASSERT_EQ(2U, s[0]->InputCount());
272 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
273 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
274 }
275
276
277 TEST_F(InstructionSelectorTest, Int32AddCommutedConstantAsLea) {
278 StreamBuilder m(this, kMachInt32, kMachInt32);
279 Node* const p0 = m.Parameter(0);
280 Node* const c0 = m.Int32Constant(15);
281 m.Return(m.Int32Add(c0, p0));
282 Stream s = m.Build();
283 ASSERT_EQ(1U, s.size());
284 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
285 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
286 ASSERT_EQ(2U, s[0]->InputCount());
287 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
288 EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
289 }
290
291
292 TEST_F(InstructionSelectorTest, Int32AddScaled2Mul) {
293 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
294 Node* const p0 = m.Parameter(0);
295 Node* const p1 = m.Parameter(1);
296 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
297 m.Return(m.Int32Add(p0, s0));
298 Stream s = m.Build();
299 ASSERT_EQ(1U, s.size());
300 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
301 EXPECT_EQ(kMode_MR2, s[0]->addressing_mode());
302 ASSERT_EQ(2U, s[0]->InputCount());
303 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
304 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
305 }
306
307
308 TEST_F(InstructionSelectorTest, Int32AddCommutedScaled2Mul) {
309 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
310 Node* const p0 = m.Parameter(0);
311 Node* const p1 = m.Parameter(1);
312 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
313 m.Return(m.Int32Add(s0, p0));
314 Stream s = m.Build();
315 ASSERT_EQ(1U, s.size());
316 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
317 EXPECT_EQ(kMode_MR2, s[0]->addressing_mode());
318 ASSERT_EQ(2U, s[0]->InputCount());
319 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
320 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
321 }
322
323
324 TEST_F(InstructionSelectorTest, Int32AddScaled2Shl) {
325 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
326 Node* const p0 = m.Parameter(0);
327 Node* const p1 = m.Parameter(1);
328 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(1));
329 m.Return(m.Int32Add(p0, s0));
330 Stream s = m.Build();
331 ASSERT_EQ(1U, s.size());
332 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
333 EXPECT_EQ(kMode_MR2, s[0]->addressing_mode());
334 ASSERT_EQ(2U, s[0]->InputCount());
335 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
336 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
337 }
338
339
340 TEST_F(InstructionSelectorTest, Int32AddCommutedScaled2Shl) {
341 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
342 Node* const p0 = m.Parameter(0);
343 Node* const p1 = m.Parameter(1);
344 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(1));
345 m.Return(m.Int32Add(s0, p0));
346 Stream s = m.Build();
347 ASSERT_EQ(1U, s.size());
348 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
349 EXPECT_EQ(kMode_MR2, s[0]->addressing_mode());
350 ASSERT_EQ(2U, s[0]->InputCount());
351 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
352 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
353 }
354
355
356 TEST_F(InstructionSelectorTest, Int32AddScaled4Mul) {
357 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
358 Node* const p0 = m.Parameter(0);
359 Node* const p1 = m.Parameter(1);
360 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(4));
361 m.Return(m.Int32Add(p0, s0));
362 Stream s = m.Build();
363 ASSERT_EQ(1U, s.size());
364 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
365 EXPECT_EQ(kMode_MR4, s[0]->addressing_mode());
366 ASSERT_EQ(2U, s[0]->InputCount());
367 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
368 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
369 }
370
371
372 TEST_F(InstructionSelectorTest, Int32AddScaled4Shl) {
373 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
374 Node* const p0 = m.Parameter(0);
375 Node* const p1 = m.Parameter(1);
376 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(2));
377 m.Return(m.Int32Add(p0, s0));
378 Stream s = m.Build();
379 ASSERT_EQ(1U, s.size());
380 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
381 EXPECT_EQ(kMode_MR4, s[0]->addressing_mode());
382 ASSERT_EQ(2U, s[0]->InputCount());
383 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
384 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
385 }
386
387
388 TEST_F(InstructionSelectorTest, Int32AddScaled8Mul) {
389 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
390 Node* const p0 = m.Parameter(0);
391 Node* const p1 = m.Parameter(1);
392 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(8));
393 m.Return(m.Int32Add(p0, s0));
394 Stream s = m.Build();
395 ASSERT_EQ(1U, s.size());
396 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
397 EXPECT_EQ(kMode_MR8, s[0]->addressing_mode());
398 ASSERT_EQ(2U, s[0]->InputCount());
399 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
400 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
401 }
402
403
404 TEST_F(InstructionSelectorTest, Int32AddScaled8Shl) {
405 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
406 Node* const p0 = m.Parameter(0);
407 Node* const p1 = m.Parameter(1);
408 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(3));
409 m.Return(m.Int32Add(p0, s0));
410 Stream s = m.Build();
411 ASSERT_EQ(1U, s.size());
412 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
413 EXPECT_EQ(kMode_MR8, s[0]->addressing_mode());
414 ASSERT_EQ(2U, s[0]->InputCount());
415 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
416 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
417 }
418
419
420 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstant) {
421 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
422 Node* const p0 = m.Parameter(0);
423 Node* const p1 = m.Parameter(1);
424 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
425 Node* const c0 = m.Int32Constant(15);
426 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
427 Stream s = m.Build();
428 ASSERT_EQ(1U, s.size());
429 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
430 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
431 ASSERT_EQ(3U, s[0]->InputCount());
432 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
433 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
434 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
435 }
436
437
438 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstantShuffle1) {
439 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
440 Node* const p0 = m.Parameter(0);
441 Node* const p1 = m.Parameter(1);
442 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
443 Node* const c0 = m.Int32Constant(15);
444 m.Return(m.Int32Add(p0, m.Int32Add(s0, c0)));
445 Stream s = m.Build();
446 ASSERT_EQ(1U, s.size());
447 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
448 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
449 ASSERT_EQ(3U, s[0]->InputCount());
450 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
451 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
452 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
453 }
454
455
456 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstantShuffle2) {
457 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
458 Node* const p0 = m.Parameter(0);
459 Node* const p1 = m.Parameter(1);
460 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
461 Node* const c0 = m.Int32Constant(15);
462 m.Return(m.Int32Add(s0, m.Int32Add(c0, p0)));
463 Stream s = m.Build();
464 ASSERT_EQ(1U, s.size());
465 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
466 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
467 ASSERT_EQ(3U, s[0]->InputCount());
468 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
469 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
470 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
471 }
472
473
474 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstantShuffle3) {
475 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
476 Node* const p0 = m.Parameter(0);
477 Node* const p1 = m.Parameter(1);
478 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
479 Node* const c0 = m.Int32Constant(15);
480 m.Return(m.Int32Add(m.Int32Add(s0, c0), p0));
481 Stream s = m.Build();
482 ASSERT_EQ(1U, s.size());
483 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
484 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
485 ASSERT_EQ(3U, s[0]->InputCount());
486 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
487 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
488 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
489 }
490
491
492 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstantShuffle4) {
493 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
494 Node* const p0 = m.Parameter(0);
495 Node* const p1 = m.Parameter(1);
496 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
497 Node* const c0 = m.Int32Constant(15);
498 m.Return(m.Int32Add(m.Int32Add(c0, p0), s0));
499 Stream s = m.Build();
500 ASSERT_EQ(1U, s.size());
501 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
502 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
503 ASSERT_EQ(3U, s[0]->InputCount());
504 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
505 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
506 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
507 }
508
509
510 TEST_F(InstructionSelectorTest, Int32AddScaled2MulWithConstantShuffle5) {
511 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
512 Node* const p0 = m.Parameter(0);
513 Node* const p1 = m.Parameter(1);
514 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(2));
515 Node* const c0 = m.Int32Constant(15);
516 m.Return(m.Int32Add(m.Int32Add(p0, s0), c0));
517 Stream s = m.Build();
518 ASSERT_EQ(1U, s.size());
519 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
520 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
521 ASSERT_EQ(3U, s[0]->InputCount());
522 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
523 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
524 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
525 }
526
527
528 TEST_F(InstructionSelectorTest, Int32AddScaled2ShlWithConstant) {
529 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
530 Node* const p0 = m.Parameter(0);
531 Node* const p1 = m.Parameter(1);
532 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(1));
533 Node* const c0 = m.Int32Constant(15);
534 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
535 Stream s = m.Build();
536 ASSERT_EQ(1U, s.size());
537 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
538 EXPECT_EQ(kMode_MR2I, s[0]->addressing_mode());
539 ASSERT_EQ(3U, s[0]->InputCount());
540 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
541 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
542 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
543 }
544
545
546 TEST_F(InstructionSelectorTest, Int32AddScaled4MulWithConstant) {
547 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
548 Node* const p0 = m.Parameter(0);
549 Node* const p1 = m.Parameter(1);
550 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(4));
551 Node* const c0 = m.Int32Constant(15);
552 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
553 Stream s = m.Build();
554 ASSERT_EQ(1U, s.size());
555 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
556 EXPECT_EQ(kMode_MR4I, s[0]->addressing_mode());
557 ASSERT_EQ(3U, s[0]->InputCount());
558 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
559 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
560 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
561 }
562
563
564 TEST_F(InstructionSelectorTest, Int32AddScaled4ShlWithConstant) {
565 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
566 Node* const p0 = m.Parameter(0);
567 Node* const p1 = m.Parameter(1);
568 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(2));
569 Node* const c0 = m.Int32Constant(15);
570 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
571 Stream s = m.Build();
572 ASSERT_EQ(1U, s.size());
573 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
574 EXPECT_EQ(kMode_MR4I, s[0]->addressing_mode());
575 ASSERT_EQ(3U, s[0]->InputCount());
576 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
577 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
578 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
579 }
580
581
582 TEST_F(InstructionSelectorTest, Int32AddScaled8MulWithConstant) {
583 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
584 Node* const p0 = m.Parameter(0);
585 Node* const p1 = m.Parameter(1);
586 Node* const s0 = m.Int32Mul(p1, m.Int32Constant(8));
587 Node* const c0 = m.Int32Constant(15);
588 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
589 Stream s = m.Build();
590 ASSERT_EQ(1U, s.size());
591 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
592 EXPECT_EQ(kMode_MR8I, s[0]->addressing_mode());
593 ASSERT_EQ(3U, s[0]->InputCount());
594 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
595 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
596 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
597 }
598
599
600 TEST_F(InstructionSelectorTest, Int32AddScaled8ShlWithConstant) {
601 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
602 Node* const p0 = m.Parameter(0);
603 Node* const p1 = m.Parameter(1);
604 Node* const s0 = m.Word32Shl(p1, m.Int32Constant(3));
605 Node* const c0 = m.Int32Constant(15);
606 m.Return(m.Int32Add(c0, m.Int32Add(p0, s0)));
607 Stream s = m.Build();
608 ASSERT_EQ(1U, s.size());
609 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
610 EXPECT_EQ(kMode_MR8I, s[0]->addressing_mode());
611 ASSERT_EQ(3U, s[0]->InputCount());
612 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
613 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
614 EXPECT_TRUE(s[0]->InputAt(2)->IsImmediate());
615 }
616
617
262 // ----------------------------------------------------------------------------- 618 // -----------------------------------------------------------------------------
263 // Multiplication. 619 // Multiplication.
264 620
265 621
266 TEST_F(InstructionSelectorTest, Int32MulWithInt32MulWithParameters) { 622 TEST_F(InstructionSelectorTest, Int32MulWithInt32MulWithParameters) {
267 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32); 623 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
268 Node* const p0 = m.Parameter(0); 624 Node* const p0 = m.Parameter(0);
269 Node* const p1 = m.Parameter(1); 625 Node* const p1 = m.Parameter(1);
270 Node* const m0 = m.Int32Mul(p0, p1); 626 Node* const m0 = m.Int32Mul(p0, p1);
271 m.Return(m.Int32Mul(m0, p0)); 627 m.Return(m.Int32Mul(m0, p0));
(...skipping 89 matching lines...) Expand 10 before | Expand all | Expand 10 after
361 EXPECT_EQ(x, s.ToInt32(s[0]->InputAt(1))); 717 EXPECT_EQ(x, s.ToInt32(s[0]->InputAt(1)));
362 ASSERT_EQ(1U, s[0]->OutputCount()); 718 ASSERT_EQ(1U, s[0]->OutputCount());
363 EXPECT_TRUE(s.IsSameAsFirst(s[0]->Output())); 719 EXPECT_TRUE(s.IsSameAsFirst(s[0]->Output()));
364 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 720 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
365 } 721 }
366 } 722 }
367 723
368 } // namespace compiler 724 } // namespace compiler
369 } // namespace internal 725 } // namespace internal
370 } // namespace v8 726 } // namespace v8
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