Rearrange emit vs emitIAS. Wait till function is done before dumping text.

src/IceCfg.cpp

 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Cfg class, including constant pool
@@ skipping 370 matching lines @@
   TimerMarker T(TimerStack::TT_doBranchOpt, this);
   for (auto I = Nodes.begin(), E = Nodes.end(); I != E; ++I) {
     auto NextNode = I;
     ++NextNode;
     (*I)->doBranchOpt(NextNode == E ? NULL : *NextNode);
   }
 }
 
 // ======================== Dump routines ======================== //
 
+void Cfg::emitTextHeader(const IceString &MangledName) {
+  Ostream &Str = Ctx->getStrEmit();
+  Str << "\t.text\n";
+  if (Ctx->getFlags().FunctionSections)
+    Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
+  if (!getInternal() || Ctx->getFlags().DisableInternal) {
+    Str << "\t.globl\t" << MangledName << "\n";
+    Str << "\t.type\t" << MangledName << ",@function\n";
+  }
+  Str << "\t.p2align " << getTarget()->getBundleAlignLog2Bytes() << ",0x";
+  for (AsmCodeByte I : getTarget()->getNonExecBundlePadding())
+    Str.write_hex(I);
+  Str << "\n";
+  Str << MangledName << ":\n";
+}
+
 void Cfg::emit() {
   TimerMarker T(TimerStack::TT_emit, this);
   if (Ctx->getFlags().DecorateAsm) {
     renumberInstructions();
     getVMetadata()->init(VMK_Uses);
     liveness(Liveness_Basic);
     dump("After recomputing liveness for -decorate-asm");
   }
   Ostream &Str = Ctx->getStrEmit();
   if (!Ctx->testAndSetHasEmittedFirstMethod()) {
     // Print a helpful command for assembling the output.
     // TODO: have the Target emit the header
     // TODO: need a per-file emit in addition to per-CFG
     Str << "# $LLVM_BIN_PATH/llvm-mc"
         << " -arch=x86"
         << " -filetype=obj"
         << " -o=MyObj.o"
         << "\n\n";
   }
-  Str << "\t.text\n";
   IceString MangledName = getContext()->mangleName(getFunctionName());
-  if (Ctx->getFlags().FunctionSections)
-    Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
-  if (!getInternal() || Ctx->getFlags().DisableInternal) {
-    Str << "\t.globl\t" << MangledName << "\n";
-    Str << "\t.type\t" << MangledName << ",@function\n";
-  }
-  Str << "\t.p2align " << getTarget()->getBundleAlignLog2Bytes() << ",0x";
-  for (AsmCodeByte I : getTarget()->getNonExecBundlePadding())
-    Str.write_hex(I);
-  Str << "\n";
+  emitTextHeader(MangledName);
   for (CfgNode *Node : Nodes)
     Node->emit(this);
   Str << "\n";
 }
 
+void Cfg::emitIAS() {
+  TimerMarker T(TimerStack::TT_emit, this);
+  assert(!Ctx->getFlags().DecorateAsm);
+  IceString MangledName = getContext()->mangleName(getFunctionName());
+  emitTextHeader(MangledName);
+  for (CfgNode *Node : Nodes)
+    Node->emitIAS(this);
+  getAssembler<Assembler>()->emitIASBytes(Ctx);
+}
+
 // Dumps the IR with an optional introductory message.
 void Cfg::dump(const IceString &Message) {
   if (!Ctx->isVerbose())
     return;
   Ostream &Str = Ctx->getStrDump();
   if (!Message.empty())
     Str << "================ " << Message << " ================\n";
   setCurrentNode(getEntryNode());
   // Print function name+args
   if (getContext()->isVerbose(IceV_Instructions)) {
@@ skipping 24 matching lines @@
     }
   }
   // Print each basic block
   for (CfgNode *Node : Nodes)
     Node->dump(this);
   if (getContext()->isVerbose(IceV_Instructions))
     Str << "}\n";
 }
 
 } // end of namespace Ice