OLD | NEW |
1 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===// | 1 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===// |
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
3 // for details. All rights reserved. Use of this source code is governed by a | 3 // for details. All rights reserved. Use of this source code is governed by a |
4 // BSD-style license that can be found in the LICENSE file. | 4 // BSD-style license that can be found in the LICENSE file. |
5 // | 5 // |
6 // Modified by the Subzero authors. | 6 // Modified by the Subzero authors. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // The Subzero Code Generator | 10 // The Subzero Code Generator |
(...skipping 54 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
65 private: | 65 private: |
66 DisplacementRelocation(FixupKind Kind, const ConstantRelocatable *Sym) | 66 DisplacementRelocation(FixupKind Kind, const ConstantRelocatable *Sym) |
67 : AssemblerFixup(Kind, Sym) {} | 67 : AssemblerFixup(Kind, Sym) {} |
68 }; | 68 }; |
69 | 69 |
70 class Immediate { | 70 class Immediate { |
71 Immediate(const Immediate &) = delete; | 71 Immediate(const Immediate &) = delete; |
72 Immediate &operator=(const Immediate &) = delete; | 72 Immediate &operator=(const Immediate &) = delete; |
73 | 73 |
74 public: | 74 public: |
75 explicit Immediate(int32_t value) : value_(value), fixup_(NULL) {} | 75 explicit Immediate(int32_t value) : value_(value), fixup_(nullptr) {} |
76 | 76 |
77 explicit Immediate(AssemblerFixup *fixup) | 77 explicit Immediate(AssemblerFixup *fixup) |
78 : value_(fixup->value()->getOffset()), fixup_(fixup) { | 78 : value_(fixup->value()->getOffset()), fixup_(fixup) { |
79 // Use the Offset in the "value" for now. If the symbol is part of | 79 // Use the Offset in the "value" for now. If the symbol is part of |
80 // ".bss", then the relocation's symbol will be plain ".bss" and | 80 // ".bss", then the relocation's symbol will be plain ".bss" and |
81 // the value will need to be adjusted further to be sym's | 81 // the value will need to be adjusted further to be sym's |
82 // bss offset + Offset. | 82 // bss offset + Offset. |
83 } | 83 } |
84 | 84 |
85 int32_t value() const { return value_; } | 85 int32_t value() const { return value_; } |
86 AssemblerFixup *fixup() const { return fixup_; } | 86 AssemblerFixup *fixup() const { return fixup_; } |
87 | 87 |
88 bool is_int8() const { | 88 bool is_int8() const { |
89 // We currently only allow 32-bit fixups, and they usually have value = 0, | 89 // We currently only allow 32-bit fixups, and they usually have value = 0, |
90 // so if fixup_ != NULL, it shouldn't be classified as int8/16. | 90 // so if fixup_ != nullptr, it shouldn't be classified as int8/16. |
91 return fixup_ == NULL && Utils::IsInt(8, value_); | 91 return fixup_ == nullptr && Utils::IsInt(8, value_); |
92 } | 92 } |
93 bool is_uint8() const { return fixup_ == NULL && Utils::IsUint(8, value_); } | 93 bool is_uint8() const { |
94 bool is_uint16() const { return fixup_ == NULL && Utils::IsUint(16, value_); } | 94 return fixup_ == nullptr && Utils::IsUint(8, value_); |
| 95 } |
| 96 bool is_uint16() const { |
| 97 return fixup_ == nullptr && Utils::IsUint(16, value_); |
| 98 } |
95 | 99 |
96 private: | 100 private: |
97 const int32_t value_; | 101 const int32_t value_; |
98 AssemblerFixup *fixup_; | 102 AssemblerFixup *fixup_; |
99 }; | 103 }; |
100 | 104 |
101 class Operand { | 105 class Operand { |
102 public: | 106 public: |
103 Operand(const Operand &other) : length_(other.length_), fixup_(other.fixup_) { | 107 Operand(const Operand &other) : length_(other.length_), fixup_(other.fixup_) { |
104 memmove(&encoding_[0], &other.encoding_[0], other.length_); | 108 memmove(&encoding_[0], &other.encoding_[0], other.length_); |
(...skipping 30 matching lines...) Expand all Loading... |
135 } | 139 } |
136 | 140 |
137 int32_t disp32() const { | 141 int32_t disp32() const { |
138 assert(length_ >= 5); | 142 assert(length_ >= 5); |
139 return bit_copy<int32_t>(encoding_[length_ - 4]); | 143 return bit_copy<int32_t>(encoding_[length_ - 4]); |
140 } | 144 } |
141 | 145 |
142 AssemblerFixup *fixup() const { return fixup_; } | 146 AssemblerFixup *fixup() const { return fixup_; } |
143 | 147 |
144 protected: | 148 protected: |
145 Operand() : length_(0), fixup_(NULL) {} // Needed by subclass Address. | 149 Operand() : length_(0), fixup_(nullptr) {} // Needed by subclass Address. |
146 | 150 |
147 void SetModRM(int mod, GPRRegister rm) { | 151 void SetModRM(int mod, GPRRegister rm) { |
148 assert((mod & ~3) == 0); | 152 assert((mod & ~3) == 0); |
149 encoding_[0] = (mod << 6) | rm; | 153 encoding_[0] = (mod << 6) | rm; |
150 length_ = 1; | 154 length_ = 1; |
151 } | 155 } |
152 | 156 |
153 void SetSIB(ScaleFactor scale, GPRRegister index, GPRRegister base) { | 157 void SetSIB(ScaleFactor scale, GPRRegister index, GPRRegister base) { |
154 assert(length_ == 1); | 158 assert(length_ == 1); |
155 assert((scale & ~3) == 0); | 159 assert((scale & ~3) == 0); |
(...skipping 13 matching lines...) Expand all Loading... |
169 length_ += disp_size; | 173 length_ += disp_size; |
170 } | 174 } |
171 | 175 |
172 void SetFixup(AssemblerFixup *fixup) { fixup_ = fixup; } | 176 void SetFixup(AssemblerFixup *fixup) { fixup_ = fixup; } |
173 | 177 |
174 private: | 178 private: |
175 uint8_t length_; | 179 uint8_t length_; |
176 uint8_t encoding_[6]; | 180 uint8_t encoding_[6]; |
177 AssemblerFixup *fixup_; | 181 AssemblerFixup *fixup_; |
178 | 182 |
179 explicit Operand(GPRRegister reg) : fixup_(NULL) { SetModRM(3, reg); } | 183 explicit Operand(GPRRegister reg) : fixup_(nullptr) { SetModRM(3, reg); } |
180 | 184 |
181 // Get the operand encoding byte at the given index. | 185 // Get the operand encoding byte at the given index. |
182 uint8_t encoding_at(intptr_t index) const { | 186 uint8_t encoding_at(intptr_t index) const { |
183 assert(index >= 0 && index < length_); | 187 assert(index >= 0 && index < length_); |
184 return encoding_[index]; | 188 return encoding_[index]; |
185 } | 189 } |
186 | 190 |
187 // Returns whether or not this operand is really the given register in | 191 // Returns whether or not this operand is really the given register in |
188 // disguise. Used from the assembler to generate better encodings. | 192 // disguise. Used from the assembler to generate better encodings. |
189 bool IsRegister(GPRRegister reg) const { | 193 bool IsRegister(GPRRegister reg) const { |
(...skipping 702 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
892 inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) { | 896 inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) { |
893 buffer_.EmitFixup(fixup); | 897 buffer_.EmitFixup(fixup); |
894 } | 898 } |
895 | 899 |
896 inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); } | 900 inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); } |
897 | 901 |
898 } // end of namespace x86 | 902 } // end of namespace x86 |
899 } // end of namespace Ice | 903 } // end of namespace Ice |
900 | 904 |
901 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H_ | 905 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H_ |
OLD | NEW |